component
LM5067MMX-2
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+47@@ -0,0 +1,47 @@+# LM5067MMX-2++**Texas Instruments** · Surge Protection Devices (SPDs) · MSOP-10++LM5067MMX-2 from Texas Instruments, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Positive supply input connected to system ground through a resistor, with a bypass capacitor to VEE; the VCC-to-VEE voltage is nominally 13 V, set by an internal zener diode. |+| 2 | UVLO/EN | input | Undervoltage lockout pin set by an external resistor divider from the system input; the enable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source, and it can be used for remote enable and disable. |+| 3 | OVLO | input | Overvoltage lockout pin set by an external resistor divider from the system input; the disable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source. |+| 4 | PWR | input | Power limit set pin; an external resistor here, together with the current sense resistor RS, sets the maximum power dissipation in the external series pass MOSFET. |+| 5 | VEE | power_in | Negative supply input connected to the system negative supply voltage, typically -48 V. |+| 6 | TIMER | bidirectional | Timing capacitor pin that sets the insertion time delay and fault timeout period, and also sets the restart timing of the LM5067-2. |+| 7 | SENSE | input | Current sense input measured from VEE across the sense resistor RS; if the voltage across RS reaches 50 mV the load current is limited and the fault timer activates. |+| 8 | GATE | output | Gate drive output that connects to the gate of the external N-channel MOSFET. |+| 9 | OUT | input | Output feedback pin connected to the external MOSFET drain, used internally to determine the MOSFET VDS for power limiting and to control the PGD output; the recommended operating range for OUT voltage above VEE is 0 to 80 V. |+| 10 | PGD | output | Open-drain power good output capable of sustaining 80 V when off; it switches high when the external MOSFET VDS falls below 1.23 V and switches low when VDS rises above approximately 2.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | MSOP-10 |+| Category | Circuit Protection |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `LM5067MMX-2`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: MSOP-10 (KiCad packages3D, STEP)+- 3D model files: `lm5067mmx-2-etched.step` / `lm5067mmx-2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5067mmx-2.step` / `lm5067mmx-2.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5067) (50 pp, sha256 `18e31f1abf9e0c9c`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5067mmx-2-datasheet.pdf)
page.jsonadded+209@@ -0,0 +1,209 @@+{+ "slug": "lm5067mmx-2",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Surge Protection Devices (SPDs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "circuit protection",+ "lm5067mmx-2",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm5067mmx-2.kicad_sym",+ "lm5067mmx-2.kicad_mod",+ "lm5067mmx-2.glb",+ "lm5067mmx-2.step",+ "lm5067mmx-2.lbr",+ "docs/hero.png",+ "docs/lm5067mmx-2-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm5067mmx-2-hero.glb",+ "lm5067mmx-2-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM5067MMX-2",+ "manufacturer": "Texas Instruments",+ "package": "MSOP-10",+ "pin_count": 10,+ "category": "Circuit Protection",+ "subcategory": "Surge Protection Devices (SPDs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5067",+ "parts": {+ "symbol": "lm5067mmx-2.kicad_sym",+ "footprint": "lm5067mmx-2.kicad_mod",+ "model_3d": "lm5067mmx-2-hero.glb",+ "model_3d_plain": "lm5067mmx-2.glb",+ "model_3d_step": "lm5067mmx-2-etched.step",+ "model_3d_step_plain": "lm5067mmx-2.step",+ "lbr": "lm5067mmx-2.lbr"+ },+ "distributor_links": {+ "lcsc": "C2861871"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:59:40Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply input connected to system ground through a resistor, with a bypass capacitor to VEE; the VCC-to-VEE voltage is nominally 13 V, set by an internal zener diode."+ },+ {+ "number": "2",+ "name": "UVLO/EN",+ "type": "input",+ "description": "Undervoltage lockout pin set by an external resistor divider from the system input; the enable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source, and it can be used for remote enable and disable."+ },+ {+ "number": "3",+ "name": "OVLO",+ "type": "input",+ "description": "Overvoltage lockout pin set by an external resistor divider from the system input; the disable threshold is 2.5 V above VEE, with a 22 µA internal hysteresis current source."+ },+ {+ "number": "4",+ "name": "PWR",+ "type": "input",+ "description": "Power limit set pin; an external resistor here, together with the current sense resistor RS, sets the maximum power dissipation in the external series pass MOSFET."+ },+ {+ "number": "5",+ "name": "VEE",+ "type": "power_in",+ "description": "Negative supply input connected to the system negative supply voltage, typically -48 V."+ },+ {+ "number": "6",+ "name": "TIMER",+ "type": "bidirectional",+ "description": "Timing capacitor pin that sets the insertion time delay and fault timeout period, and also sets the restart timing of the LM5067-2."+ },+ {+ "number": "7",+ "name": "SENSE",+ "type": "input",+ "description": "Current sense input measured from VEE across the sense resistor RS; if the voltage across RS reaches 50 mV the load current is limited and the fault timer activates."+ },+ {+ "number": "8",+ "name": "GATE",+ "type": "output",+ "description": "Gate drive output that connects to the gate of the external N-channel MOSFET."+ },+ {+ "number": "9",+ "name": "OUT",+ "type": "input",+ "description": "Output feedback pin connected to the external MOSFET drain, used internally to determine the MOSFET VDS for power limiting and to control the PGD output; the recommended operating range for OUT voltage above VEE is 0 to 80 V."+ },+ {+ "number": "10",+ "name": "PGD",+ "type": "output",+ "description": "Open-drain power good output capable of sustaining 80 V when off; it switches high when the external MOSFET VDS falls below 1.23 V and switches low when VDS rises above approximately 2.5 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet text says VCC should be connected to system ground through a resistor, which looks inc; The VSSOP-10 pinout was taken from the 10-Lead VSSOP top view and the VSSOP-10 column of the Pin Fun; Only pages 1-5, 40-43 were supplied. The mechanical package drawing and pin 1 orientation are not in"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0567,+ "at": "2026-10-08T00:59:24"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5067",+ "pages": 50,+ "sha256": "18e31f1abf9e0c9c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm5067mmx-2.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm5067mmx-2-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e1e77c33cabbe825cc3085bfed99113c393b3bc726e5b113953171cedc13c647",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}