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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs lm4040c25fta-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
lm4040c25fta-tp-etched.fit.json lm4040c25fta-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lm4040c25fta-tp-etched.glb lm4040c25fta-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lm4040c25fta-tp-etched.step lm4040c25fta-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lm4040c25fta-tp.glb Publish 0.1.0 · Ray 1mo ago
lm4040c25fta-tp.kicad_mod Publish 0.1.0 · Ray 1mo ago
lm4040c25fta-tp.kicad_sym Publish 0.1.0 · Ray 1mo ago
lm4040c25fta-tp.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 3 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
lm4040c25fta-tp.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 7d ago
README.md lm4040c25fta-tp: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

LM4040C25FTA-TP

TECH PUBLIC · Voltage Reference · SOT-23

LM4040C25FTA-TP from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CATHODE passive Cathode (+) of the shunt voltage reference. Connect through a series resistor RS to the supply so that reverse current stays between IRMIN (45 µA typ, 65 µA max) and 15 mA. Regulates to VR = 2.5 V (±0.5%) with respect to ANODE.
2 ANODE passive Anode (−) of the shunt voltage reference. Normally tied to circuit ground; the 2.5 V reference voltage appears between CATHODE and this pin.
3 NC passive No internal connection to the reference circuit; pin is attached to the die substrate. Must be either left open or connected to ANODE - do not tie to CATHODE or to any other node.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • LM4040C25FTA-TP

CAD (KiCad official)

  • Symbol: LM4040C25FTA-TP
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lm4040c25fta-tp-etched.step / lm4040c25fta-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm4040c25fta-tp.step / lm4040c25fta-tp.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lm4040c25fta-tp.step 59 KB You want the bare part, or you mark your own boards.
lm4040c25fta-tp-etched.step 2.1 MB You want the part with LM4040C25FTA-TP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 529 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (6 pp, sha256 86174a00f4146ef3, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF