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LM25576MH

Texas Instruments · DC-DC Converters · HTSSOP-20-EP

LM25576MH from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_out Bias regulator output that follows VIN below 9 V and regulates to about 7 V above 9 V; needs a 0.1 µF to 1 µF ceramic decoupling capacitor, and an external 7.5 V to 14 V may be applied to reduce power dissipation, with VCC never allowed to exceed VIN.
2 SD input Shutdown/UVLO input: below 0.7 V the regulator is in low-power shutdown, 0.7 V to 1.225 V gives standby, above 1.225 V it operates; an internal 5 µA pull-up applies when open and SD must never exceed 14 V.
3 VIN power_in Input supply pin with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V.
4 VIN power_in Input supply pin, the second VIN pin, with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V.
5 SYNC bidirectional Oscillator synchronization input/output that can be driven by an external open-drain clock with pulses longer than 15 ns, and may be tied to other LM25576 devices to synchronize them; SYNC to GND is limited to 7 V.
6 COMP output Internal error amplifier output; the loop compensation network connects between this pin and FB.
7 FB input Feedback input to the inverting input of the internal error amplifier, with a regulation threshold of 1.225 V and a 7 V absolute maximum.
8 RT input Oscillator frequency-setting pin; a single resistor from RT to AGND sets the switching frequency between 50 kHz and 1 MHz.
9 RAMP output Slope-compensation ramp pin; a capacitor between RAMP and AGND, recommended 50 pF to 2000 pF, sets the emulated current-ramp slope, with a 7 V absolute maximum.
10 AGND power_in Analog ground and internal reference for the regulator control functions; resistors and small-signal capacitors (RT, SS, RAMP) must return directly to this pin.
11 SS output Soft-start pin; an external capacitor with the internal 10 µA source sets the reference rise time, and the pin is held low during standby, VCC UVLO and thermal shutdown, with a 7 V absolute maximum.
12 OUT output Output voltage sense connection, connected directly to the regulated output voltage; OUT to GND is limited by VIN.
13 PGND power_in Power ground, the low-side reference for the power switch and the IS sense resistor.
14 PGND power_in Power ground, the second PGND pin, serving as the low-side reference for the power switch and the IS sense resistor.
15 IS input Recirculating diode current-sense connection to the internal sense resistor and sample-and-hold, which senses diode current at the end of the off-time and sets the DC level of the emulated ramp.
16 IS input Recirculating diode current-sense connection, the second IS pin, tied to the same internal sense resistor and sample-and-hold as pin 15.
17 SW output Switch node, the source terminal of the internal buck switch, which must connect to the external Schottky diode and buck inductor; steady-state SW to GND is limited to -1.5 V.
18 SW output Switch node, the second SW pin, which must connect to the external Schottky diode and buck inductor.
19 PRE input Bootstrap precharge assist pin, an open-drain connection to SW that lets an internal 70 Ω precharge MOSFET charge the BST capacitor for 265 ns each cycle before on-time; PRE to GND is limited to 45 V.
20 BST input Bootstrap boost input; a 0.022 µF ceramic capacitor between BST and SW is recommended, and BST to SW is limited to 14 V.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: LM25576MH
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lm25576mh-etched.step / lm25576mh-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm25576mh.step / lm25576mh.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 ed0031dc76d29d88, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF