component
LM25576MH
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Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# LM25576MH++**Texas Instruments** · DC-DC Converters · HTSSOP-20-EP++LM25576MH from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_out | Bias regulator output that follows VIN below 9 V and regulates to about 7 V above 9 V; needs a 0.1 µF to 1 µF ceramic decoupling capacitor, and an external 7.5 V to 14 V may be applied to reduce power dissipation, with VCC never allowed to exceed VIN. |+| 2 | SD | input | Shutdown/UVLO input: below 0.7 V the regulator is in low-power shutdown, 0.7 V to 1.225 V gives standby, above 1.225 V it operates; an internal 5 µA pull-up applies when open and SD must never exceed 14 V. |+| 3 | VIN | power_in | Input supply pin with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V. |+| 4 | VIN | power_in | Input supply pin, the second VIN pin, with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V. |+| 5 | SYNC | bidirectional | Oscillator synchronization input/output that can be driven by an external open-drain clock with pulses longer than 15 ns, and may be tied to other LM25576 devices to synchronize them; SYNC to GND is limited to 7 V. |+| 6 | COMP | output | Internal error amplifier output; the loop compensation network connects between this pin and FB. |+| 7 | FB | input | Feedback input to the inverting input of the internal error amplifier, with a regulation threshold of 1.225 V and a 7 V absolute maximum. |+| 8 | RT | input | Oscillator frequency-setting pin; a single resistor from RT to AGND sets the switching frequency between 50 kHz and 1 MHz. |+| 9 | RAMP | output | Slope-compensation ramp pin; a capacitor between RAMP and AGND, recommended 50 pF to 2000 pF, sets the emulated current-ramp slope, with a 7 V absolute maximum. |+| 10 | AGND | power_in | Analog ground and internal reference for the regulator control functions; resistors and small-signal capacitors (RT, SS, RAMP) must return directly to this pin. |+| 11 | SS | output | Soft-start pin; an external capacitor with the internal 10 µA source sets the reference rise time, and the pin is held low during standby, VCC UVLO and thermal shutdown, with a 7 V absolute maximum. |+| 12 | OUT | output | Output voltage sense connection, connected directly to the regulated output voltage; OUT to GND is limited by VIN. |+| 13 | PGND | power_in | Power ground, the low-side reference for the power switch and the IS sense resistor. |+| 14 | PGND | power_in | Power ground, the second PGND pin, serving as the low-side reference for the power switch and the IS sense resistor. |+| 15 | IS | input | Recirculating diode current-sense connection to the internal sense resistor and sample-and-hold, which senses diode current at the end of the off-time and sets the DC level of the emulated ramp. |+| 16 | IS | input | Recirculating diode current-sense connection, the second IS pin, tied to the same internal sense resistor and sample-and-hold as pin 15. |+| 17 | SW | output | Switch node, the source terminal of the internal buck switch, which must connect to the external Schottky diode and buck inductor; steady-state SW to GND is limited to -1.5 V. |+| 18 | SW | output | Switch node, the second SW pin, which must connect to the external Schottky diode and buck inductor. |+| 19 | PRE | input | Bootstrap precharge assist pin, an open-drain connection to SW that lets an internal 70 Ω precharge MOSFET charge the BST capacitor for 265 ns each cycle before on-time; PRE to GND is limited to 45 V. |+| 20 | BST | input | Bootstrap boost input; a 0.022 µF ceramic capacitor between BST and SW is recommended, and BST to SW is limited to 14 V. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM25576MH`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm25576mh-etched.step` / `lm25576mh-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm25576mh.step` / `lm25576mh.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm25576) (37 pp, sha256 `ed0031dc76d29d88`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm25576mh-datasheet.pdf)
page.jsonadded+279@@ -0,0 +1,279 @@+{+ "slug": "lm25576mh",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm25576mh",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm25576mh.kicad_sym",+ "lm25576mh.kicad_mod",+ "lm25576mh.glb",+ "lm25576mh.step",+ "lm25576mh.lbr",+ "docs/hero.png",+ "docs/lm25576mh-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm25576mh-hero.glb",+ "lm25576mh-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM25576MH",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm25576",+ "parts": {+ "symbol": "lm25576mh.kicad_sym",+ "footprint": "lm25576mh.kicad_mod",+ "model_3d": "lm25576mh-hero.glb",+ "model_3d_plain": "lm25576mh.glb",+ "model_3d_step": "lm25576mh-etched.step",+ "model_3d_step_plain": "lm25576mh.step",+ "lbr": "lm25576mh.lbr"+ },+ "distributor_links": {+ "lcsc": "C1355313",+ "mouser": "926-LM25576MH"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T12:55:31Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": "926-LM25576MH",+ "status": "found",+ "lifecycle": "Obsolete"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC",+ "type": "power_out",+ "description": "Bias regulator output that follows VIN below 9 V and regulates to about 7 V above 9 V; needs a 0.1 µF to 1 µF ceramic decoupling capacitor, and an external 7.5 V to 14 V may be applied to reduce power dissipation, with VCC never allowed to exceed VIN."+ },+ {+ "number": "2",+ "name": "SD",+ "type": "input",+ "description": "Shutdown/UVLO input: below 0.7 V the regulator is in low-power shutdown, 0.7 V to 1.225 V gives standby, above 1.225 V it operates; an internal 5 µA pull-up applies when open and SD must never exceed 14 V."+ },+ {+ "number": "3",+ "name": "VIN",+ "type": "power_in",+ "description": "Input supply pin with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V."+ },+ {+ "number": "4",+ "name": "VIN",+ "type": "power_in",+ "description": "Input supply pin, the second VIN pin, with a nominal operating range of 6 V to 42 V and an absolute maximum of 45 V."+ },+ {+ "number": "5",+ "name": "SYNC",+ "type": "bidirectional",+ "description": "Oscillator synchronization input/output that can be driven by an external open-drain clock with pulses longer than 15 ns, and may be tied to other LM25576 devices to synchronize them; SYNC to GND is limited to 7 V."+ },+ {+ "number": "6",+ "name": "COMP",+ "type": "output",+ "description": "Internal error amplifier output; the loop compensation network connects between this pin and FB."+ },+ {+ "number": "7",+ "name": "FB",+ "type": "input",+ "description": "Feedback input to the inverting input of the internal error amplifier, with a regulation threshold of 1.225 V and a 7 V absolute maximum."+ },+ {+ "number": "8",+ "name": "RT",+ "type": "input",+ "description": "Oscillator frequency-setting pin; a single resistor from RT to AGND sets the switching frequency between 50 kHz and 1 MHz."+ },+ {+ "number": "9",+ "name": "RAMP",+ "type": "output",+ "description": "Slope-compensation ramp pin; a capacitor between RAMP and AGND, recommended 50 pF to 2000 pF, sets the emulated current-ramp slope, with a 7 V absolute maximum."+ },+ {+ "number": "10",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground and internal reference for the regulator control functions; resistors and small-signal capacitors (RT, SS, RAMP) must return directly to this pin."+ },+ {+ "number": "11",+ "name": "SS",+ "type": "output",+ "description": "Soft-start pin; an external capacitor with the internal 10 µA source sets the reference rise time, and the pin is held low during standby, VCC UVLO and thermal shutdown, with a 7 V absolute maximum."+ },+ {+ "number": "12",+ "name": "OUT",+ "type": "output",+ "description": "Output voltage sense connection, connected directly to the regulated output voltage; OUT to GND is limited by VIN."+ },+ {+ "number": "13",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, the low-side reference for the power switch and the IS sense resistor."+ },+ {+ "number": "14",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, the second PGND pin, serving as the low-side reference for the power switch and the IS sense resistor."+ },+ {+ "number": "15",+ "name": "IS",+ "type": "input",+ "description": "Recirculating diode current-sense connection to the internal sense resistor and sample-and-hold, which senses diode current at the end of the off-time and sets the DC level of the emulated ramp."+ },+ {+ "number": "16",+ "name": "IS",+ "type": "input",+ "description": "Recirculating diode current-sense connection, the second IS pin, tied to the same internal sense resistor and sample-and-hold as pin 15."+ },+ {+ "number": "17",+ "name": "SW",+ "type": "output",+ "description": "Switch node, the source terminal of the internal buck switch, which must connect to the external Schottky diode and buck inductor; steady-state SW to GND is limited to -1.5 V."+ },+ {+ "number": "18",+ "name": "SW",+ "type": "output",+ "description": "Switch node, the second SW pin, which must connect to the external Schottky diode and buck inductor."+ },+ {+ "number": "19",+ "name": "PRE",+ "type": "input",+ "description": "Bootstrap precharge assist pin, an open-drain connection to SW that lets an internal 70 Ω precharge MOSFET charge the BST capacitor for 265 ns each cycle before on-time; PRE to GND is limited to 45 V."+ },+ {+ "number": "20",+ "name": "BST",+ "type": "input",+ "description": "Bootstrap boost input; a 0.022 µF ceramic capacitor between BST and SW is recommended, and BST to SW is limited to 14 V."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 6 (COMP) has no type in Table 4-1; typed as output because the table describes it as the interna; Table 4-1 lists SYNC (pin 5) as an input, but the text says it is an oscillator sync input or output; Table 4-1 lists PRE (pin 19) as an input, but the text describes it as an open-drain output connecte",+ "exposed pad 21 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 27,+ "cost_usd": 0.1401,+ "at": "2026-10-08T12:55:08"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm25576",+ "pages": 37,+ "sha256": "ed0031dc76d29d88",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm25576mh.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e88c477efc8a1a4516124a51e2d33c396b12f0cc2e0fd28ec5223405d52862bd",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm25576mh-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5d1e176a053d8dc0252ef606c6ae955c60ebdb63daa0601de754842a2e1a3d4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}