component
LM25122QPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# LM25122QPWPRQ1++**Texas Instruments** · DC-DC Controllers · HTSSOP-20-EP++LM25122QPWPRQ1 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SYNCOUT | output | Clock output pin providing 180° phase-shifted clock output for interleaved multi-phase operation; can be left floating when not used. |+| 2 | OPT | input | Clock synchronization selection pin for master/slave configuration; internal pullup/pulldown held at 0.15V default; must not be left floating. |+| 3 | CSN | input | Inverting input of current sense amplifier; connect to the negative-side of the current sense resistor with common-mode range 3V to 42V. |+| 4 | CSP | input | Non-inverting input of current sense amplifier with 10 V/V gain; connect to positive-side of current sense resistor with common-mode range 3V to 42V. |+| 5 | VIN | power_in | Supply voltage input source for VCC regulator; connect to input capacitor and source with short, low-impedance paths; operating range 4.5V to 42V at startup, minimum 3V after startup. |+| 6 | UVLO | input | Undervoltage lockout programming pin; voltage below 0.4V causes shutdown, 0.4V to 1.2V causes standby with VCC regulator operational, above 1.2V enables startup; maximum voltage 15V. |+| 7 | SS | input | Soft-start programming pin; external capacitor with internal 10-μA current source sets output voltage ramp rate during soft-start sequence from input to target voltage. |+| 8 | SYNCIN/RT | input | Internal oscillator frequency programming pin; resistor to AGND sets switching frequency up to 600 kHz maximum or accepts external clock synchronization pulses up to 1.2 MHz. |+| 9 | AGND | power_in | Analog ground connection serving as return path for internal voltage reference, error amplifier, and all analog circuits. |+| 10 | FB | input | Feedback inverting input of internal error amplifier with 1.2V regulation threshold; FB voltage above 2.7V at initial power-on configures slave mode operation. |+| 11 | COMP | output | Output of internal error amplifier (DC gain 80 dB, bandwidth 3 MHz); connect Type 2 feedback compensation network between this pin and FB pin. |+| 12 | SLOPE | input | Slope compensation resistor connection pin; single resistor between SLOPE and AGND programs amplitude for stability above 50% duty cycle; cannot be left floating. |+| 13 | MODE | input | Switching mode selection pin with 700-kΩ internal pullup and 100-kΩ pulldown held to 0.15V default; voltage above 1.2V enables forced PWM mode, below 1.2V enables diode emulation mode. |+| 14 | RES | output | Restart timer external capacitor connection pin for configuring hiccup mode off-time and restart delay during overload conditions; connect to AGND when hiccup mode not required. |+| 15 | PGND | power_in | Power ground connection pin for low-side N-channel MOSFET gate driver; must connect directly to source terminal of low-side NMOS switch. |+| 16 | LO | output | Low-side N-channel MOSFET gate drive output with 3A sink/source capability; connect to gate through short, low-inductance path with forced off-time 330-750 ns. |+| 17 | VCC | power_out | VCC bias supply pin providing internal regulated 7.6V for controller and gate drivers; decouple to PGND with 1-47 μF low-ESR capacitor placed close to device; can accept 9-14.5V external supply through blocking diode. |+| 18 | SW | bidirectional | Switching node of boost regulator connecting bootstrap capacitor, high-side NMOS source, and low-side NMOS drain; maximum voltage 60V with typical swing 0V to output voltage. |+| 19 | HO | output | High-side N-channel MOSFET gate drive output with 3A sink/source capability and 100% duty cycle capacity via internal charge pump; connect to high-side gate through short, low-inductance path. |+| 20 | BST | power_out | Bootstrap supply voltage for high-side gate driver connected to bootstrap diode cathode; internal charge pump sources 200-μA current to bootstrap capacitor for full high-side drive capability. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Supply Chip |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM25122QPWPRQ1`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm25122qpwprq1-etched.step` / `lm25122qpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm25122qpwprq1.step` / `lm25122qpwprq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm25122-q1) (49 pp, sha256 `958379e72596a27b`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm25122qpwprq1-datasheet.pdf)
page.jsonadded+236@@ -0,0 +1,236 @@+{+ "slug": "lm25122qpwprq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Controllers, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "lm25122qpwprq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm25122qpwprq1.kicad_sym",+ "lm25122qpwprq1.kicad_mod",+ "lm25122qpwprq1.glb",+ "lm25122qpwprq1.step",+ "lm25122qpwprq1.lbr",+ "docs/hero.png",+ "docs/lm25122qpwprq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LM25122QPWPRQ1",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Power Supply Chip",+ "subcategory": "DC-DC Controllers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm25122-q1",+ "parts": {+ "symbol": "lm25122qpwprq1.kicad_sym",+ "footprint": "lm25122qpwprq1.kicad_mod",+ "model_3d": "lm25122qpwprq1-etched.glb",+ "model_3d_plain": "lm25122qpwprq1.glb",+ "model_3d_step": "lm25122qpwprq1-etched.step",+ "model_3d_step_plain": "lm25122qpwprq1.step",+ "lbr": "lm25122qpwprq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C527471",+ "digikey": "296-LM25122QPWPRQ1TR-ND",+ "mouser": "595-LM25122QPWPRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T17:18:29Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-LM25122QPWPRQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM25122QPWPRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SYNCOUT",+ "type": "output",+ "description": "Clock output pin providing 180° phase-shifted clock output for interleaved multi-phase operation; can be left floating when not used."+ },+ {+ "number": "2",+ "name": "OPT",+ "type": "input",+ "description": "Clock synchronization selection pin for master/slave configuration; internal pullup/pulldown held at 0.15V default; must not be left floating."+ },+ {+ "number": "3",+ "name": "CSN",+ "type": "input",+ "description": "Inverting input of current sense amplifier; connect to the negative-side of the current sense resistor with common-mode range 3V to 42V."+ },+ {+ "number": "4",+ "name": "CSP",+ "type": "input",+ "description": "Non-inverting input of current sense amplifier with 10 V/V gain; connect to positive-side of current sense resistor with common-mode range 3V to 42V."+ },+ {+ "number": "5",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply voltage input source for VCC regulator; connect to input capacitor and source with short, low-impedance paths; operating range 4.5V to 42V at startup, minimum 3V after startup."+ },+ {+ "number": "6",+ "name": "UVLO",+ "type": "input",+ "description": "Undervoltage lockout programming pin; voltage below 0.4V causes shutdown, 0.4V to 1.2V causes standby with VCC regulator operational, above 1.2V enables startup; maximum voltage 15V."+ },+ {+ "number": "7",+ "name": "SS",+ "type": "input",+ "description": "Soft-start programming pin; external capacitor with internal 10-μA current source sets output voltage ramp rate during soft-start sequence from input to target voltage."+ },+ {+ "number": "8",+ "name": "SYNCIN/RT",+ "type": "input",+ "description": "Internal oscillator frequency programming pin; resistor to AGND sets switching frequency up to 600 kHz maximum or accepts external clock synchronization pulses up to 1.2 MHz."+ },+ {+ "number": "9",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground connection serving as return path for internal voltage reference, error amplifier, and all analog circuits."+ },+ {+ "number": "10",+ "name": "FB",+ "type": "input",+ "description": "Feedback inverting input of internal error amplifier with 1.2V regulation threshold; FB voltage above 2.7V at initial power-on configures slave mode operation."+ },+ {+ "number": "11",+ "name": "COMP",+ "type": "output",+ "description": "Output of internal error amplifier (DC gain 80 dB, bandwidth 3 MHz); connect Type 2 feedback compensation network between this pin and FB pin."+ },+ {+ "number": "12",+ "name": "SLOPE",+ "type": "input",+ "description": "Slope compensation resistor connection pin; single resistor between SLOPE and AGND programs amplitude for stability above 50% duty cycle; cannot be left floating."+ },+ {+ "number": "13",+ "name": "MODE",+ "type": "input",+ "description": "Switching mode selection pin with 700-kΩ internal pullup and 100-kΩ pulldown held to 0.15V default; voltage above 1.2V enables forced PWM mode, below 1.2V enables diode emulation mode."+ },+ {+ "number": "14",+ "name": "RES",+ "type": "output",+ "description": "Restart timer external capacitor connection pin for configuring hiccup mode off-time and restart delay during overload conditions; connect to AGND when hiccup mode not required."+ },+ {+ "number": "15",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connection pin for low-side N-channel MOSFET gate driver; must connect directly to source terminal of low-side NMOS switch."+ },+ {+ "number": "16",+ "name": "LO",+ "type": "output",+ "description": "Low-side N-channel MOSFET gate drive output with 3A sink/source capability; connect to gate through short, low-inductance path with forced off-time 330-750 ns."+ },+ {+ "number": "17",+ "name": "VCC",+ "type": "power_out",+ "description": "VCC bias supply pin providing internal regulated 7.6V for controller and gate drivers; decouple to PGND with 1-47 μF low-ESR capacitor placed close to device; can accept 9-14.5V external supply through blocking diode."+ },+ {+ "number": "18",+ "name": "SW",+ "type": "bidirectional",+ "description": "Switching node of boost regulator connecting bootstrap capacitor, high-side NMOS source, and low-side NMOS drain; maximum voltage 60V with typical swing 0V to output voltage."+ },+ {+ "number": "19",+ "name": "HO",+ "type": "output",+ "description": "High-side N-channel MOSFET gate drive output with 3A sink/source capability and 100% duty cycle capacity via internal charge pump; connect to high-side gate through short, low-inductance path."+ },+ {+ "number": "20",+ "name": "BST",+ "type": "power_out",+ "description": "Bootstrap supply voltage for high-side gate driver connected to bootstrap diode cathode; internal charge pump sources 200-μA current to bootstrap capacitor for full high-side drive capability."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: VCC pin type classification: Pin 17 is marked as P/O/I (power/output/input) in datasheet but classif"+ ],+ "pages_sent": 49,+ "cost_usd": 0.4814,+ "at": "2026-10-01T17:18:05"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm25122-q1",+ "pages": 49,+ "sha256": "958379e72596a27b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}