component
LM25122QPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLM25122QPWPRQ1
Texas Instruments · DC-DC Controllers · HTSSOP-20-EP
LM25122QPWPRQ1 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYNCOUT | output | Clock output pin providing 180° phase-shifted clock output for interleaved multi-phase operation; can be left floating when not used. |
| 2 | OPT | input | Clock synchronization selection pin for master/slave configuration; internal pullup/pulldown held at 0.15V default; must not be left floating. |
| 3 | CSN | input | Inverting input of current sense amplifier; connect to the negative-side of the current sense resistor with common-mode range 3V to 42V. |
| 4 | CSP | input | Non-inverting input of current sense amplifier with 10 V/V gain; connect to positive-side of current sense resistor with common-mode range 3V to 42V. |
| 5 | VIN | power_in | Supply voltage input source for VCC regulator; connect to input capacitor and source with short, low-impedance paths; operating range 4.5V to 42V at startup, minimum 3V after startup. |
| 6 | UVLO | input | Undervoltage lockout programming pin; voltage below 0.4V causes shutdown, 0.4V to 1.2V causes standby with VCC regulator operational, above 1.2V enables startup; maximum voltage 15V. |
| 7 | SS | input | Soft-start programming pin; external capacitor with internal 10-μA current source sets output voltage ramp rate during soft-start sequence from input to target voltage. |
| 8 | SYNCIN/RT | input | Internal oscillator frequency programming pin; resistor to AGND sets switching frequency up to 600 kHz maximum or accepts external clock synchronization pulses up to 1.2 MHz. |
| 9 | AGND | power_in | Analog ground connection serving as return path for internal voltage reference, error amplifier, and all analog circuits. |
| 10 | FB | input | Feedback inverting input of internal error amplifier with 1.2V regulation threshold; FB voltage above 2.7V at initial power-on configures slave mode operation. |
| 11 | COMP | output | Output of internal error amplifier (DC gain 80 dB, bandwidth 3 MHz); connect Type 2 feedback compensation network between this pin and FB pin. |
| 12 | SLOPE | input | Slope compensation resistor connection pin; single resistor between SLOPE and AGND programs amplitude for stability above 50% duty cycle; cannot be left floating. |
| 13 | MODE | input | Switching mode selection pin with 700-kΩ internal pullup and 100-kΩ pulldown held to 0.15V default; voltage above 1.2V enables forced PWM mode, below 1.2V enables diode emulation mode. |
| 14 | RES | output | Restart timer external capacitor connection pin for configuring hiccup mode off-time and restart delay during overload conditions; connect to AGND when hiccup mode not required. |
| 15 | PGND | power_in | Power ground connection pin for low-side N-channel MOSFET gate driver; must connect directly to source terminal of low-side NMOS switch. |
| 16 | LO | output | Low-side N-channel MOSFET gate drive output with 3A sink/source capability; connect to gate through short, low-inductance path with forced off-time 330-750 ns. |
| 17 | VCC | power_out | VCC bias supply pin providing internal regulated 7.6V for controller and gate drivers; decouple to PGND with 1-47 μF low-ESR capacitor placed close to device; can accept 9-14.5V external supply through blocking diode. |
| 18 | SW | bidirectional | Switching node of boost regulator connecting bootstrap capacitor, high-side NMOS source, and low-side NMOS drain; maximum voltage 60V with typical swing 0V to output voltage. |
| 19 | HO | output | High-side N-channel MOSFET gate drive output with 3A sink/source capability and 100% duty cycle capacity via internal charge pump; connect to high-side gate through short, low-inductance path. |
| 20 | BST | power_out | Bootstrap supply voltage for high-side gate driver connected to bootstrap diode cathode; internal charge pump sources 200-μA current to bootstrap capacitor for full high-side drive capability. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Supply Chip |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
LM25122QPWPRQ1 - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lm25122qpwprq1-etched.step/lm25122qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25122qpwprq1.step/lm25122qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (49 pp, sha256
958379e72596a27b, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).