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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs lgs63030ep: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lgs63030ep-etched.fit.json lgs63030ep: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lgs63030ep-etched.glb lgs63030ep: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lgs63030ep-etched.step lgs63030ep: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lgs63030ep.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
lgs63030ep.kicad_mod Publish 0.1.0 · Ray
lgs63030ep.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
lgs63030ep.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
lgs63030ep.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
package.json Publish 0.2.0 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json lgs63030ep: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md lgs63030ep: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LGS63030EP

Legend Si · LED Drivers · ESOP-8

LGS63030EP from Legend Si, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB input Feedback input. Connected to an external sense resistor R_SENSE from the LED cathode string, the output current is set by I_OUT = V_FB / R_SENSE with typical V_FB = 0.2 V (0.195-0.205 V). FB bias current ≤ 50 nA.
2 GND power_in Device ground. All voltages in the datasheet are referenced to this pin. Also serves as the return for the input decoupling capacitor which should be placed as close as possible to VIN/GND.
3 SW power_out Internal boost power switch node (drain of the 350 mΩ low-side N-MOSFET). Connect the external boost inductor (typ. 4.7 µH) and Schottky freewheeling diode (e.g. PMEG6020R) at this pin. Absolute max SW-to-GND voltage: -0.3 V to +60 V; peak switch current up to 3 A. ESOP-8 exposes SW on pins 3 and 4, which must be tied together on the PCB.
4 SW power_out Second SW pin on the ESOP-8 package - electrically identical to pin 3, providing parallel current path and heat spreading for the internal 350 mΩ boost switch. Must be shorted to pin 3 on the PCB and connected to the boost inductor / Schottky diode node.
5 VIN power_in Main power input, 3.0 V to 60 V (absolute max 60 V, -0.3 V to +60 V). UVLO rising ≈ 3.0 V / falling ≈ 2.6 V. Bypass with a 4.7 µF (or larger) X5R/X7R ceramic capacitor rated ≥ 100 V, placed as close as possible to VIN and GND.
6 NC unconnected No connect. No external component is required; leave the pin floating (suspended). Do not tie to any signal or plane.
7 OVP input Output over-voltage protection sense. Connect the midpoint of a resistor divider from V_OUT to GND to this pin. OVP trips when V_OVP rises above ≈ 1 V (recovery ≈ 0.86 V); the resulting V_OUT_OVP = (1 + R1/R2) × 1 V. Absolute max -0.3 V to +6 V; keep the pin voltage below 1 V in normal operation.
8 EN input Enable / dimming input. Accepts a DC level (analog dimming 0.6-1.2 V on LGS63030) or a PWM square wave (100 Hz-1 kHz on LGS63030, 100 Hz-25 kHz on LGS63032) to dim the LED output. Drive > 0.5 V (typ. 0.31 V rising / 0.35 V falling for digital thresholds) to enable the boost; drive < 0.4 V to enter low-power sleep. Internal 800 kΩ pull-down; do not float. Input current ≤ 10 µA at V_EN = 5 V. Absolute max -0.3 V to +6 V.

Key specifications

Parameter Value
Manufacturer Legend Si
Package ESOP-8
Category LED-drv
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LGS63030EP
  • LGS63030EPB6

CAD (KiCad official)

  • Symbol: LGS63030EP
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: lgs63030ep-etched.step / lgs63030ep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lgs63030ep.step / lgs63030ep.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lgs63030ep.step 193 KB You want the bare part, or you mark your own boards.
lgs63030ep-etched.step 2.2 MB You want the part with LGS63030EP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 533 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Legend Si datasheet (20 pp, sha256 f40f2a466f0716f8, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF