Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

LF347DR

Texas Instruments · FET InputAmplifiers · SOIC-14

LF347DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output pin of amplifier 1. Maximum peak output voltage swing ±13.5 V typical into RL = 10 kΩ.
2 1IN- input Inverting input pin of amplifier 1. JFET input with typical input bias current of 50 pA and input resistance of 10^12 Ω.
3 1IN+ input Noninverting input pin of amplifier 1. JFET input with typical input bias current of 50 pA and input resistance of 10^12 Ω.
4 VCC+ power_in Positive supply voltage. Recommended operating range 3.5 V to 18 V; absolute maximum 18 V. Typical supply current 8 mA.
5 2IN+ input Noninverting input pin of amplifier 2. JFET input with typical input bias current of 50 pA.
6 2IN- input Inverting input pin of amplifier 2. JFET input with typical input bias current of 50 pA.
7 2OUT output Output pin of amplifier 2. Maximum peak output voltage swing ±13.5 V typical into RL = 10 kΩ.
8 3OUT output Output pin of amplifier 3. Maximum peak output voltage swing ±13.5 V typical into RL = 10 kΩ.
9 3IN- input Inverting input pin of amplifier 3. JFET input with typical input bias current of 50 pA.
10 3IN+ input Noninverting input pin of amplifier 3. JFET input with typical input bias current of 50 pA.
11 VCC- power_in Negative supply voltage. Recommended operating range -3.5 V to -18 V; absolute maximum -18 V.
12 4IN+ input Noninverting input pin of amplifier 4. JFET input with typical input bias current of 50 pA.
13 4IN- input Inverting input pin of amplifier 4. JFET input with typical input bias current of 50 pA.
14 4OUT output Output pin of amplifier 4. Maximum peak output voltage swing ±13.5 V typical into RL = 10 kΩ.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • LF347DRD
  • LF347DRBD
  • LF347DRN
  • LF347DRBN

CAD (KiCad official)

  • Symbol: LF347DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: lf347dr-etched.step / lf347dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lf347dr.step / lf347dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 2ae820672c857470, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF