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LESD8LVL5.0CT5G

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LRC Electrostatic And Surge Protection (TVS/ESD), SOD-882. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttvs-fuse-board level protectionlesd8lvl5.0ct5gfactory-2.0.0extractor-text

Verified LESD8LVL5.0CT5G

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier lcsc, 2 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LESD8LVL5.0CT5G · SOD-882 · 2 pins
  • ✓copper: 2 copper pads, none touching another net
  • ✓datasheet: unpolarised two-terminal part: pins 1 and 2 by library convention, no names to check
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: D_SOD-882
  • ✓files: 6 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-yc_ubyw4/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 1 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 2 pins = 2 pads
  • ✓pose: 1 STEP(s) Z-up, seated, centred
  • ✓symbol: 2 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lesd8lvl5-0ct5g.kicad_sym✓ lesd8lvl5-0ct5g.kicad_mod✓ lesd8lvl5-0ct5g.step
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

LESD8LVL5.0CT5G

LRC · Electrostatic And Surge Protection (TVS/ESD) · SOD-882

LESD8LVL5.0CT5G from LRC, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive Pin 1 is one of the two terminals of the bidirectional TVS ESD protection diode, rated for IEC 61000-4-2 ±20 kV contact and air discharge, with VRWM 5 V and VBR 6 V minimum.
2 2 passive Pin 2 is the second terminal of the bidirectional TVS ESD protection diode, and the datasheet does not assign anode or cathode polarity to either terminal.

Key specifications

Parameter Value
Manufacturer LRC
Package SOD-882
Category TVS/Fuse/Board Level Protection
Pins 2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Total Power Dissipation on FR-5 Board PD 200 mW @ TA=25℃ 1
Junction and Storage Temperature Range TJ,TSTG -55 150 ℃ 1
Lead Solder Temperature, Maximum TL 260 ℃ 10 Second Duration 1
IEC 61000-4-2 (ESD) -20 20 kV 1
Peak Power Dissipation Ppk 50 W Note 3 2
Maximum Reverse Peak Pulse Current IPP 4 A Note 3 2
Clamping Voltage @ IPP VC 9 V @ IPP = 1 A (Note 3) 2
Clamping Voltage @ IPP VC 16 V @ IPP = 3 A (Note 3) 2
Clamping Voltage @ MAX IPP VC 19 V @MAX IPP (Note 3) 2
Working Peak Reverse Voltage VRWM 5 V 2
Maximum Reverse Leakage Current @ VRWM IR 0.5 A @ VRWM 2
Breakdown Voltage @ IT VBR 6 V @ IT (Note 2) 2
Capacitance C 12 pF @ VR = 0 and f = 1.0 MHz 2

CAD (KiCad official)

  • Symbol: LESD8LVL5.0CT5G
  • Footprint: Diode_SMD:D_SOD-882
  • 3D model: SOD-882 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 747ac58436820e1a, retrieved 2026-11-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF