# LBTP880DPTUG

**LRC** · Bipolar (BJT) · TO-252

LBTP880DPTUG from LRC, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Base | input | Base terminal of the PNP power transistor; datasheet test conditions use base drive of -400 mA for VCE(sat) at IC = -8 A and -800 mA for VBE(sat) at IC = -8 A. |
| 2 | Collector | passive | Collector terminal rated for -8 A DC and -16 A peak (tp < 5 ms), with VCEO of -80 V and VCBO of -80 V. |
| 3 | Emitter | passive | Emitter terminal; the emitter-base voltage is limited to -5 V (VEBO). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Emitter Breakdown Voltage | VBR(CEO) | -80 |  |  | V | IC=-1 mA, IB=0 | 2 |
| Collector-Base Breakdown Voltage | VBR(CBO) | -80 |  |  | V | IC=-100 µA, IE=0 | 2 |
| Emitter-Base Breakdown Voltage | VBR(EBO) | -5 |  |  | V | IE=-100 µA, IC=0 | 2 |
| DC Current Gain | HFE | 60 |  | 200 |  | VCE=-1 V, IC=-2 A | 2 |
| DC Current Gain | HFE | 40 |  |  |  | VCE=-1 V, IC=-4 A | 2 |
| Base-Emitter saturation voltage | VBE(sat) |  |  | -1.5 | V | IC=-8 A, IB=-800 mA | 2 |
| Collector Current (DC) | IC |  |  | -8 | A | Ta=25°C | 1 |
| Peak collector current | ICM |  |  | -16 | A | tp < 5 ms | 1 |
| Collector-Emitter Voltage | VCEO |  |  | -80 | V | Ta=25°C | 1 |
| Collector-Base Voltage | VCBO |  |  | -80 | V | Ta=25°C | 1 |
| Emitter-Base Voltage | VEBO |  |  | -5 | V | Ta=25°C | 1 |
| Total Power Dissipation @ TA = 25°C | PD |  |  | 1.75 | W | Surface mounted on minimum pad sizes recommended (Note 1) | 1 |
| Total Power Dissipation @ TC = 25°C | PD |  |  | 20 | W | TC=25°C | 1 |
| Derate above 25°C (TA) |  |  |  | 0.014 | W/°C | Derate above 25°C, TA basis | 1 |
| Derate above 25°C (TC) |  |  |  | 0.16 | W/°C | Derate above 25°C, TC basis | 1 |
| Junction Temperature | Tj |  |  | 150 | ℃ |  | 1 |
| Storage Temperature Range | Tstg | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance, Junction-to-Ambient | RΘJA |  |  | 71.4 | °C/W | Surface mounted on minimum pad sizes recommended (Note 1) | 1 |
| Thermal Resistance, Junction-to-Case | RΘJC |  |  | 6.25 | °C/W | Note 2: shell is entire metal surface at bottom | 1 |

## CAD (KiCad official)

- Symbol: `LBTP880DPTUG`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `lbtp880dptug-etched.step` / `lbtp880dptug-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lbtp880dptug.step` / `lbtp880dptug.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590921436997361664) (6 pp, sha256 `b1a2070e20e1d035`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lbtp880dptug-datasheet.pdf)