# LBSS84ELT1G

**LRC** · MOSFETs · SOT-23

LBSS84ELT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal; gate-to-source voltage limited to ±20 V and G-S ESD protected to ±1000V. |
| 2 | Source | passive | Source terminal of the P-channel MOSFET; continuous drain current -130 mA at TA = 25°C. |
| 3 | Drain | passive | Drain terminal; drain-source voltage rated -60 V and pulsed drain current -520 mA (tp≤10μs). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain–Source Voltage | VDSS |  |  | -60 | V |  | 1 |
| Gate–to–Source Voltage | VGSS | -20 |  | 20 | V |  | 1 |
| Drain Current, continuous | ID |  |  | -130 | mA | TA = 25°C | 1 |
| Drain Current, pulsed | IDM |  |  | -520 | mA | tp ≤ 10 μs | 1 |
| Total Device Dissipation, FR-5 Board | PD |  |  | 225 | mW | FR-5 board (Note 1), TA = 25°C | 1 |
| Derate above 25°C |  |  | 1.8 |  | mW/°C | Derate above 25°C | 1 |
| Thermal Resistance, Junction–to–Ambient | RΘJA |  |  | 556 | °C/W | FR-5 board (Note 1), 1.0×0.75×0.062 in. | 1 |
| Junction and Storage Temperature | TJ,Tstg | -55 |  | 150 | °C |  | 1 |
| Maximum Lead Temperature for Soldering Purposes | TL |  |  | 260 | °C | 10 s | 1 |
| Drain–Source Breakdown Voltage | V(BR)DSS | -60 |  |  | V | VGS = 0, ID = -250 μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -15 | μA | VGS = 0, VDS = -25 V | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -0.1 | μA | VGS = 0, VDS = -60 V | 2 |
| Gate–Body Leakage Current, Forward | IGSSF |  |  | 10 | μA | VGS = 20 V | 2 |
| Gate–Body Leakage Current, Reverse | IGSSR |  |  | -10 | μA | VGS = -20 V | 2 |
| Gate Threshold Voltage | VGS(th) | -0.9 |  | -2 | V | VDS = VGS, ID = -250 μA | 2 |
| Static Drain–Source On–State Resistance | RDS(on) |  | 2 | 6 | Ω | VGS = -5.0 V, ID = -100 mA | 2 |
| Static Drain–Source On–State Resistance | RDS(on) |  | 1.8 | 5 | Ω | VGS = -10 V, ID = -100 mA | 2 |
| Transfer Admittance | /yfs/ | 50 |  |  | mS | VDS = -25 V, ID = -100 mA, f = 1.0 kHz | 2 |
| Continuous Source-Drain Current | IS |  |  | -0.13 | A |  | 2 |
| Pulsed Source-Drain Current | ISM |  |  | -0.52 | A |  | 2 |

## CAD (KiCad official)

- Symbol: `LBSS84ELT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lbss84elt1g-etched.step` / `lbss84elt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lbss84elt1g.step` / `lbss84elt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884614039949312) (5 pp, sha256 `6a0c71056e2850e2`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lbss84elt1g-datasheet.pdf)