component
LBSS138LT1G
Public Made by Adomby adom
LRC MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLBSS138LT1G
LRC · MOSFETs · SOT-23
LBSS138LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-to-source voltage is ±20 Vdc continuous max, with threshold VGS(th) of 0.5 V to 1.5 V at ID = 1.0 mAdc. |
| 2 | S | passive | Source of the N-channel MOSFET, connected to the body diode anode in the schematic symbol. |
| 3 | D | passive | Drain; drain-to-source voltage is 50 Vdc max, continuous drain current 200 mA and pulsed 800 mA (tp ≤ 10 µs). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Breakdown Voltage | V(BR)DSS | 50 | Vdc | VGS = 0 Vdc, ID = 250 µAdc | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 0.1 | µAdc | VDS = 25 Vdc, VGS = 0 Vdc | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 0.5 | µAdc | VDS = 50 Vdc, VGS = 0 Vdc | 2 | ||
| Gate-Source Leakage Current | IGSS | -0.1 | 0.1 | µAdc | VGS = ± 20 Vdc, VDS = 0 Vdc | 2 | |
| Gate-Source Threshold Voltage | VGS(th) | 0.5 | 1.5 | Vdc | VDS = VGS, ID = 1.0 mAdc | 2 | |
| Static Drain-to-Source On-Resistance | rDS(on) | 5.6 | 10 | Ohms | VGS = 2.75 Vdc, ID < 200 mAdc, TA = –40°C to +85°C | 2 | |
| Forward Transconductance | gfs | 100 | mmhos | VDS = 25 Vdc, ID = 200 mAdc, f = 1.0 kHz | 2 | ||
| Input Capacitance | Ciss | 40 | 50 | pF | VDS = 25 Vdc, VGS = 0, f = 1 MHz | 2 | |
| Output Capacitance | Coss | 12 | 25 | pF | VDS = 25 Vdc, VGS = 0, f = 1 MHz | 2 | |
| Transfer Capacitance | Crss | 3.5 | 5 | pF | VDG = 25 Vdc, VGS = 0, f = 1 MHz | 2 | |
| Turn-On Delay Time | td(on) | 20 | ns | 2 | |||
| Turn-Off Delay Time | td(off) | 20 | ns | VDD = 30 Vdc, ID = 0.2 Adc, | 2 | ||
| Static Drain-to-Source On-Resistance | rDS(on) | 3.5 | Ohms | VGS = 5.0 Vdc, ID = 200 mAdc | 2 | ||
| Drain-to-Source Voltage | VDSS | 50 | Vdc | 1 | |||
| Gate-to-Source Voltage – Continuous | VGS | -20 | 20 | Vdc | 1 | ||
| Drain Current – Continuous | ID | 200 | mA | TA = 25°C | 1 | ||
| Drain Current – Pulsed | IDM | 800 | mA | tp ≤ 10 µs | 1 | ||
| Total Power Dissipation | PD | 225 | mW | TA = 25°C | 1 | ||
| Operating and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Thermal Resistance – Junction-to-Ambient | RθJA | 556 | °C/W | 1 | |||
| Maximum Lead Temperature for Soldering Purposes | TL | 260 | °C | for 10 seconds | 1 |
CAD (KiCad official)
- Symbol:
LBSS138LT1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
lbss138lt1g-etched.step/lbss138lt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lbss138lt1g.step/lbss138lt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (7 pp, sha256
68ca0860943499d8, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).