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Ray Set visibility: public 9ad8589 1d ago
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{
  "schema_version": 1,
  "type": "component",
  "slug": "lan9354",
  "title": "LAN9354",
  "brief": "Microchip Tech Interface - Specialized, QFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "lan9354",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "LAN9354",
    "manufacturer": "Microchip Tech",
    "package": "QFN-56-EP(8x8)",
    "pin_count": 57,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/3589db097247234b5607c8e099d4acaf.pdf",
    "parts": {
      "symbol": "lan9354.kicad_sym",
      "footprint": "lan9354.kicad_mod",
      "model_3d": "lan9354-hero.glb",
      "model_3d_plain": "lan9354-etched.glb",
      "model_3d_step": "lan9354-etched.step",
      "model_3d_step_plain": "lan9354.step",
      "lbr": "lan9354.lbr"
    },
    "distributor_links": {
      "lcsc": "C633504"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T18:20:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OSCI",
        "type": "input",
        "description": "External 25 MHz crystal input, which can also be driven by a single-ended clock oscillator with OSCO left unconnected."
      },
      {
        "number": "2",
        "name": "OSCO",
        "type": "output",
        "description": "External 25 MHz crystal output; leave unconnected when OSCI is driven by a single-ended clock oscillator."
      },
      {
        "number": "3",
        "name": "OSCVDD12",
        "type": "power_in",
        "description": "Crystal +1.2 V power supply, supplied by the on-chip regulator unless regulator-off mode is configured via REG_EN."
      },
      {
        "number": "4",
        "name": "OSCVSS",
        "type": "power_in",
        "description": "Crystal ground."
      },
      {
        "number": "5",
        "name": "VDD33",
        "type": "power_in",
        "description": "+3.3 V power supply for the internal regulators, which must be supplied even if the internal regulators are disabled."
      },
      {
        "number": "6",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply, supplied by the on-chip regulator unless regulator-off mode is set via REG_EN; 1 µF and 470 pF decoupling capacitors in parallel to ground should be used on this pin."
      },
      {
        "number": "7",
        "name": "REG_EN",
        "type": "passive",
        "description": "When tied to 3.3 V, the internal 1.2 V regulators are enabled."
      },
      {
        "number": "8",
        "name": "FXLOSEN",
        "type": "input",
        "description": "Three-level strap selecting FX-LOS versus FX-SD/copper mode: below 1 V selects FX-SD/copper for both ports, 1.5 V selects FX-LOS for port A, and above 2 V selects FX-LOS for ports A and B."
      },
      {
        "number": "9",
        "name": "FXSDA/FXLOSA/FXSDENA",
        "type": "input",
        "description": "Port A fiber signal detect input (valid above 2 V typ.) when FX-LOS mode is not selected, or fiber loss-of-signal input (high = LOS) in FX-LOS mode, with the FX-SD enable strap selecting FX-SD above 1 V (typ.)."
      },
      {
        "number": "10",
        "name": "FXSDB/FXLOSB/FXSDENB",
        "type": "input",
        "description": "Port B fiber signal detect input (valid above 2 V typ.) when FX-LOS mode is not selected, or fiber loss-of-signal input (high = LOS) in FX-LOS mode, with the FX-SD enable strap selecting FX-SD above 1 V (typ.)."
      },
      {
        "number": "11",
        "name": "RST#",
        "type": "input",
        "description": "Active-low system reset input with internal pull-up that may be left unconnected because an internal power-on reset exists, and must meet the reset timing requirements in Section 20.0."
      },
      {
        "number": "12",
        "name": "GPIO7",
        "type": "bidirectional",
        "description": "General purpose I/O 7, fully programmable as a push-pull output, open-drain output, or Schmitt-triggered input via GPIO_CFG and GPIO_DATA_DIR."
      },
      {
        "number": "13",
        "name": "GPIO6",
        "type": "bidirectional",
        "description": "General purpose I/O 6, fully programmable as a push-pull output, open-drain output, or Schmitt-triggered input via GPIO_CFG and GPIO_DATA_DIR."
      },
      {
        "number": "14",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "15",
        "name": "LED5/GPIO5/PHYADD",
        "type": "bidirectional",
        "description": "LED 5 output when LED 5 Enable is set (open-drain polarity set by PHYADD strap at reset), otherwise GPIO5; the PHYADD strap sets the default Switch PHY Address Select soft-strap."
      },
      {
        "number": "16",
        "name": "LED4/GPIO4/1588EN",
        "type": "bidirectional",
        "description": "LED 4 output when LED 4 Enable is set (open-drain polarity set by 1588EN strap at reset), otherwise GPIO4; the 1588EN strap sets the default 1588 Enable soft-strap."
      },
      {
        "number": "17",
        "name": "P0_SPEED",
        "type": "input",
        "description": "In RMII MAC mode this live speed input is typically tied to the external PHY speed indication and can be overridden by VPHY_SPEED_SEL_LSB when auto-negotiation is cleared; it is not used in RMII PHY mode."
      },
      {
        "number": "18",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "19",
        "name": "P0_OUTD1/P0_MODE2",
        "type": "bidirectional",
        "description": "Port 0 RMII output data bit 1 (8 mA drive; transmit data in MAC mode, receive data in PHY mode), also the Port 0 Mode[2] configuration strap."
      },
      {
        "number": "20",
        "name": "P0_OUTD0/P0_MODE1",
        "type": "bidirectional",
        "description": "Port 0 RMII output data bit 0 (8 mA drive; transmit data in MAC mode, receive data in PHY mode), also the Port 0 Mode[1] configuration strap."
      },
      {
        "number": "21",
        "name": "P0_OUTDV",
        "type": "output",
        "description": "RMII output data valid, which is TX_EN to the external PHY in MAC mode and CRS_DV to the external MAC in PHY mode (8 mA drive)."
      },
      {
        "number": "22",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply, supplied by the on-chip regulator unless regulator-off mode is set via REG_EN."
      },
      {
        "number": "23",
        "name": "P0_REFCLK/P0_MODE0",
        "type": "bidirectional",
        "description": "Port 0 RMII 50 MHz reference clock, an input or output selected by the RMII Clock Direction bit, with 12 mA or 16 mA drive when output; also the Port 0 Mode[0] configuration strap."
      },
      {
        "number": "24",
        "name": "P0_INDV",
        "type": "input",
        "description": "RMII input data valid, which is CRS_DV from the external PHY in MAC mode and TX_EN from the external MAC in PHY mode (VIS input with pull-down)."
      },
      {
        "number": "25",
        "name": "P0_IND0",
        "type": "input",
        "description": "RMII input data bit 0, receive data from the external PHY in MAC mode and transmit data from the external MAC in PHY mode (VIS input with pull-down)."
      },
      {
        "number": "26",
        "name": "P0_IND1",
        "type": "input",
        "description": "RMII input data bit 1, receive data from the external PHY in MAC mode and transmit data from the external MAC in PHY mode (VIS input with pull-down)."
      },
      {
        "number": "27",
        "name": "RESERVED",
        "type": "unconnected",
        "description": "This pin is reserved and must be left unconnected for proper operation."
      },
      {
        "number": "28",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "29",
        "name": "LED3/GPIO3/EEEEN",
        "type": "bidirectional",
        "description": "LED 3 output when LED 3 Enable is set (open-drain polarity set by EEEEN strap at reset), otherwise GPIO3; the EEEEN strap sets the default EEE Enable soft-straps."
      },
      {
        "number": "30",
        "name": "P0_DUPLEX",
        "type": "input",
        "description": "In RMII MAC mode this live duplex input is typically tied to the external PHY duplex indication and can be overridden by VPHY_DUPLEX when auto-negotiation is cleared; it is not used in RMII PHY mode."
      },
      {
        "number": "31",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "32",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply, supplied by the on-chip regulator unless regulator-off mode is set via REG_EN."
      },
      {
        "number": "33",
        "name": "P0_MDC",
        "type": "bidirectional",
        "description": "SMI/MII management clock: an input from an external master in slave modes and an output to external PHY(s) in MII master mode (8 mA); an external pull-down is recommended when SMI/MII is not used."
      },
      {
        "number": "34",
        "name": "P0_MDIO",
        "type": "bidirectional",
        "description": "SMI/MII management data to/from an external master (slave modes) or external PHY(s) (MII master mode); an external pull-up is required when SMI or MII is used."
      },
      {
        "number": "35",
        "name": "TESTMODE",
        "type": "input",
        "description": "This pin must be tied to VSS for proper operation."
      },
      {
        "number": "36",
        "name": "I2CSDA/EESDA/TMS",
        "type": "bidirectional",
        "description": "I2C slave serial data input/output to/from the external master (VIS/VOD8), which must be pulled up by an external resistor at all times."
      },
      {
        "number": "37",
        "name": "I2CSCL/EESCL/TCK",
        "type": "bidirectional",
        "description": "I2C slave serial clock input from the external master (VIS), which is not driven until the EEPROM is loaded."
      },
      {
        "number": "38",
        "name": "IRQ",
        "type": "output",
        "description": "Interrupt request output whose polarity, source and buffer type (open-drain or push-pull) are programmable via the Interrupt Configuration Register (IRQ_CFG)."
      },
      {
        "number": "39",
        "name": "LED2/GPIO2/E2PSIZE",
        "type": "bidirectional",
        "description": "LED 2 output when LED 2 Enable is set (open-drain polarity set by E2PSIZE strap at reset), otherwise GPIO2; the E2PSIZE strap selects EEPROM size (low = 1K to 16K bits, high = 32K to 512K bits)."
      },
      {
        "number": "40",
        "name": "LED1/GPIO1/TDI",
        "type": "bidirectional",
        "description": "LED 1 output when LED 1 Enable is set, otherwise GPIO1 fully programmable as push-pull output, open-drain output, or Schmitt-triggered input."
      },
      {
        "number": "41",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "42",
        "name": "LED0/GPIO0/TDO/MNGT0",
        "type": "bidirectional",
        "description": "LED 0 output when LED 0 Enable is set (open-drain polarity set by MNGT0 strap at reset), otherwise GPIO0; the MNGT0 strap selects serial management mode (0 = SMI, 1 = I2C)."
      },
      {
        "number": "43",
        "name": "VDD33TXRX1",
        "type": "power_in",
        "description": "+3.3 V Port A analog power supply (see power connection notes)."
      },
      {
        "number": "44",
        "name": "TXNA",
        "type": "bidirectional",
        "description": "Port A twisted pair transmit/receive negative channel 1 (AIO); in fiber mode this is the Port A FX transmit negative OLVPECL output."
      },
      {
        "number": "45",
        "name": "TXPA",
        "type": "bidirectional",
        "description": "Port A twisted pair transmit/receive positive channel 1 (AIO); in fiber mode this is the Port A FX transmit positive OLVPECL output."
      },
      {
        "number": "46",
        "name": "RXNA",
        "type": "bidirectional",
        "description": "Port A twisted pair transmit/receive negative channel 2 (AIO); in fiber mode this is the Port A FX receive negative analog input."
      },
      {
        "number": "47",
        "name": "RXPA",
        "type": "bidirectional",
        "description": "Port A twisted pair transmit/receive positive channel 2 (AIO); in fiber mode this is the Port A FX receive positive analog input."
      },
      {
        "number": "48",
        "name": "VDD12TX1",
        "type": "power_in",
        "description": "Port A transmitter +1.2 V supply from an external 1.2 V supply or the internal regulator; it must be tied to VDD12TX2 for proper operation."
      },
      {
        "number": "49",
        "name": "RBIAS",
        "type": "passive",
        "description": "Bias reference for internal circuits, connected to an external 12.1 kΩ, 1% resistor to ground (nominal voltage 1.2 V)."
      },
      {
        "number": "50",
        "name": "VDD33BIAS",
        "type": "power_in",
        "description": "+3.3 V master bias power supply."
      },
      {
        "number": "51",
        "name": "VDD12TX2",
        "type": "power_in",
        "description": "Port B transmitter +1.2 V supply from an external 1.2 V supply or the internal regulator; it must be tied to VDD12TX1 for proper operation."
      },
      {
        "number": "52",
        "name": "RXPB",
        "type": "bidirectional",
        "description": "Port B twisted pair transmit/receive positive channel 2 (AIO); in fiber mode this is the Port B FX receive positive analog input."
      },
      {
        "number": "53",
        "name": "RXNB",
        "type": "bidirectional",
        "description": "Port B twisted pair transmit/receive negative channel 2 (AIO); in fiber mode this is the Port B FX receive negative analog input."
      },
      {
        "number": "54",
        "name": "TXPB",
        "type": "bidirectional",
        "description": "Port B twisted pair transmit/receive positive channel 1 (AIO); in fiber mode this is the Port B FX transmit positive OLVPECL output."
      },
      {
        "number": "55",
        "name": "TXNB",
        "type": "bidirectional",
        "description": "Port B twisted pair transmit/receive negative channel 1 (AIO); in fiber mode this is the Port B FX transmit negative OLVPECL output."
      },
      {
        "number": "56",
        "name": "VDD33TXRX2",
        "type": "power_in",
        "description": "+3.3 V Port B analog power supply (see power connection notes)."
      },
      {
        "number": "57",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package size not verified: the source text identifies the package as 56-pin QFN with exposed pad (Pb; Exposed pad has no numeric pin number on the package; it is listed as 'Exposed Pad' in Table 3-1 and; Buffer types are datasheet buffer classes mapped to KiCad ERC classes by judgment: AIO pins and mult",
          "exposed pad 57 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint",
          "36/57 pins cited to the wrong page (name found elsewhere): ['9:FXSDA/FXLOSA/FXSDENA@p14', '10:FXSDB/FXLOSB/FXSDENB@p15', '13:GPIO6@p21', '14:VDDIO@p25']"
        ],
        "pages_sent": 50,
        "cost_usd": 0.2401,
        "at": "2026-10-30T18:20:10"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/3589db097247234b5607c8e099d4acaf.pdf",
        "pages": 487,
        "sha256": "6d0f1e1a944406cb",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 57,
        "described": 57,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lan9354.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          8,
          8,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "54eb482f12c9d8b70c1bfc78306a1c34f412f3556e225cbd097840e5abdb7981",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lan9354-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          8,
          8,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "df4e95755603f918f24b50799fc726ac606203d42a1be59e1005dd7981e4f49c",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Microchip Tech",
      "Package": "QFN-56-EP(8x8)",
      "Category": "Communication Interface Chip/UART/485/232",
      "Pins": "57"
    },
    "appearance": {
      "contacts": {
        "quote": "with the FXSDB pin. As such, the LVPECL levels ensure that the input is greater than 1 V (typ.) and that Signal Detect mode is selected. When TP copper is desired, the Signal Detect input function is ",
        "page": 101,
        "doc": "ds.pdf",
        "material": "copper"
      },
      "version": 1,
      "datasheet_sha256": "6d0f1e1a944406cbcecee44d2fe457f6eeada572e344cac6f1b09795a0f9ef46"
    },
    "characteristics": {
      "version": 1,
      "source": "datasheet",
      "datasheet_sha256": "6d0f1e1a944406cbcecee44d2fe457f6eeada572e344cac6f1b09795a0f9ef46",
      "rows": [
        {
          "name": "Supply Voltage (VDD12TX1, VDD12TX2, OSCVDD12, VDDCR)",
          "symbol": "",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": 0,
          "typ": null,
          "max": 1.5,
          "conditions": "Note 1",
          "source_page": 467,
          "source": "datasheet"
        },
        {
          "name": "Supply Voltage (VDD33TXRX1, VDD33TXRX2, VDD33BIAS, VDD33, VDDIO)",
          "symbol": "",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": 0,
          "typ": null,
          "max": 3.6,
          "conditions": "Note 1",
          "source_page": 467,
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