LAN9303M-AKZE

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<library>
<description></description>
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  <pin name="P1_OUTCLK" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>
  <pin name="P1_OUTDV" x="17.78" y="-35.56" length="middle" direction="out" rot="R180"/>
  <pin name="VDD18CORE@2" x="17.78" y="-38.1" length="middle" direction="out" rot="R180"/>
  <pin name="VDD33IO@5" x="17.78" y="-40.64" length="middle" direction="pwr" rot="R180"/>
  <pin name="P1_OUTD2/P1_MODE2" x="17.78" y="-43.18" length="middle" direction="out" rot="R180"/>
  <pin name="P1_OUTD3/DUPLEX_POL_1" x="17.78" y="-45.72" length="middle" direction="out" rot="R180"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="LAN9303M-AKZE" prefix="U">
  <description></description>
  <gates>
    <gate name="G$1" symbol="LAN9303M-AKZE" x="0" y="0"/>
  </gates>
  <devices>
    <device name="" package="QFN-72-1EP_10x10mm_P0.5mm_EP6x6mm">
      <connects>
        <connect gate="G$1" pin="P0_IND2" pad="1"/>
        <connect gate="G$1" pin="P0_IND1" pad="2"/>
        <connect gate="G$1" pin="P0_IND0" pad="3"/>
        <connect gate="G$1" pin="P0_INDV" pad="4"/>
        <connect gate="G$1" pin="P0_INER" pad="5"/>
        <connect gate="G$1" pin="P0_INCLK" pad="6"/>
        <connect gate="G$1" pin="VDD33IO" pad="7"/>
        <connect gate="G$1" pin="VDD18CORE" pad="8"/>
        <connect gate="G$1" pin="P0_OUTD3/DUPLEX_POL_0" pad="9"/>
        <connect gate="G$1" pin="P0_OUTD2/P0_MODE2" pad="10"/>
        <connect gate="G$1" pin="P0_OUTD1/P0_MODE1" pad="11"/>
        <connect gate="G$1" pin="P0_OUTD0/P0_MODE0" pad="12"/>
        <connect gate="G$1" pin="P1_IND3" pad="13"/>
        <connect gate="G$1" pin="P1_IND2" pad="14"/>
        <connect gate="G$1" pin="P1_IND1" pad="15"/>
        <connect gate="G$1" pin="P1_IND0" pad="16"/>
        <connect gate="G$1" pin="VDD33IO@2" pad="17"/>
        <connect gate="G$1" pin="P1_INDV" pad="18"/>
        <connect gate="G$1" pin="P1_INER" pad="19"/>
        <connect gate="G$1" pin="P1_INCLK" pad="20"/>
        <connect gate="G$1" pin="P0_OUTDV" pad="21"/>
        <connect gate="G$1" pin="P0_OUTCLK" pad="22"/>
        <connect gate="G$1" pin="P0_COL" pad="23"/>
        <connect gate="G$1" pin="P0_CRS" pad="24"/>
        <connect gate="G$1" pin="P0_DUPLEX" pad="25"/>
        <connect gate="G$1" pin="MDIO" pad="26"/>
        <connect gate="G$1" pin="MDC" pad="27"/>
        <connect gate="G$1" pin="VDD33IO@3" pad="28"/>
        <connect gate="G$1" pin="LED5/GPIO5/PHYADDR_LED5P" pad="29"/>
        <connect gate="G$1" pin="LED4/GPIO4/MNGT1_LED4P" pad="30"/>
        <connect gate="G$1" pin="LED3/GPIO3/MNGT0_LED3P" pad="31"/>
        <connect gate="G$1" pin="LED2/GPIO2/E2PSIZE_LED2P" pad="32"/>
        <connect gate="G$1" pin="LED1/GPIO1/AMDIX2_LED1P" pad="33"/>
        <connect gate="G$1" pin="LED0/GPIO0/AMDIX1_LED0P" pad="34"/>
        <connect gate="G$1" pin="P1_DUPLEX" pad="35"/>
        <connect gate="G$1" pin="P1_COL" pad="36"/>
        <connect gate="G$1" pin="P1_CRS" pad="37"/>
        <connect gate="G$1" pin="EP" pad="73"/>
        <connect gate="G$1" pin="P0_IND3" pad="72"/>
        <connect gate="G$1" pin="TXN2" pad="71"/>
        <connect gate="G$1" pin="TXP2" pad="70"/>
        <connect gate="G$1" pin="VDD33A2" pad="69"/>
        <connect gate="G$1" pin="RXN2" pad="68"/>
        <connect gate="G$1" pin="RXP2" pad="67"/>
        <connect gate="G$1" pin="VDD33A2@2" pad="66"/>
        <connect gate="G$1" pin="VDD18TX2" pad="65"/>
        <connect gate="G$1" pin="VDD33BIAS" pad="64"/>
        <connect gate="G$1" pin="EXRES" pad="63"/>
        <connect gate="G$1" pin="VDD18TX1" pad="62"/>
        <connect gate="G$1" pin="VDD33A1" pad="61"/>
        <connect gate="G$1" pin="RXP1" pad="60"/>
        <connect gate="G$1" pin="RXN1" pad="59"/>
        <connect gate="G$1" pin="VDD33A1@2" pad="58"/>
        <connect gate="G$1" pin="TXP1" pad="57"/>
        <connect gate="G$1" pin="TXN1" pad="56"/>
        <connect gate="G$1" pin="VDD18PLL" pad="55"/>
        <connect gate="G$1" pin="XO" pad="54"/>
        <connect gate="G$1" pin="XI" pad="53"/>
        <connect gate="G$1" pin="IRQ" pad="52"/>
        <connect gate="G$1" pin="nRST" pad="51"/>
        <connect gate="G$1" pin="EE_SCL/SCL" pad="50"/>
        <connect gate="G$1" pin="EE_SDA/SDA" pad="49"/>
        <connect gate="G$1" pin="TEST2" pad="48"/>
        <connect gate="G$1" pin="TEST1" pad="47"/>
        <connect gate="G$1" pin="VDD33IO@4" pad="46"/>
        <connect gate="G$1" pin="P1_OUTD0/P1_MODE0" pad="45"/>
        <connect gate="G$1" pin="P1_OUTD1/P1_MODE1" pad="44"/>
        <connect gate="G$1" pin="P1_OUTCLK" pad="43"/>
        <connect gate="G$1" pin="P1_OUTDV" pad="42"/>
        <connect gate="G$1" pin="VDD18CORE@2" pad="41"/>
        <connect gate="G$1" pin="VDD33IO@5" pad="40"/>
        <connect gate="G$1" pin="P1_OUTD2/P1_MODE2" pad="39"/>
        <connect gate="G$1" pin="P1_OUTD3/DUPLEX_POL_1" pad="38"/>
      </connects>
      <technologies><technology name=""/></technologies>
    </device>
  </devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>