LAN8741A-EN-TR

{
  "slug": "lan8741a-en-tr",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Ethernet ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "lan8741a-en-tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lan8741a-en-tr.kicad_sym",
    "lan8741a-en-tr.kicad_mod",
    "lan8741a-en-tr.glb",
    "lan8741a-en-tr.step",
    "lan8741a-en-tr.lbr",
    "docs/hero.png",
    "docs/lan8741a-en-tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lan8741a-en-tr-hero.glb",
    "lan8741a-en-tr-hero.overlay.json",
    "lan8741a-en-tr-etched.glb"
  ],
  "component": {
    "mpn": "LAN8741A-EN-TR",
    "manufacturer": "Microchip Tech",
    "package": "QFN-32-EP(5x5)",
    "pin_count": 33,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Ethernet ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/fc8f71c8a5d12d9d1e53c9c3be1c93cb.pdf",
    "parts": {
      "symbol": "lan8741a-en-tr.kicad_sym",
      "footprint": "lan8741a-en-tr.kicad_mod",
      "model_3d": "lan8741a-en-tr-hero.glb",
      "model_3d_plain": "lan8741a-en-tr-etched.glb",
      "model_3d_step": "lan8741a-en-tr-etched.step",
      "model_3d_step_plain": "lan8741a-en-tr.step",
      "lbr": "lan8741a-en-tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C621422",
      "digikey": "LAN8741A-EN-TR-ND",
      "mouser": "579-LAN8741A-EN-TR"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T16:45:18Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "LAN8741A-EN-TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "579-LAN8741A-EN-TR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD2A",
        "type": "power_in",
        "description": "+3.3 V channel 2 analog port power, supplying channel 2 and the internal regulator; connect per the reference schematic."
      },
      {
        "number": "2",
        "name": "LED2/nINTSEL",
        "type": "output",
        "description": "LED2 is driven active when the link runs at 100 Mbps and is inactive at 10 Mbps or during line isolation; the nINTSEL strap (pulled up by default) selects nINT, or TXER/TXD4 when pulled low to VSS, on pin 18."
      },
      {
        "number": "3",
        "name": "LED1/REGOFF",
        "type": "output",
        "description": "LED1 is driven active when a valid link is detected and blinks on activity; the REGOFF strap pulled high to VDD2A disables the internal 1.2 V regulator."
      },
      {
        "number": "4",
        "name": "XTAL2",
        "type": "output",
        "description": "External crystal output; leave unconnected when a single-ended clock oscillator is used on XTAL1/CLKIN."
      },
      {
        "number": "5",
        "name": "XTAL1/CLKIN",
        "type": "input",
        "description": "External crystal input, or single-ended clock oscillator input (CLKIN) when an oscillator is used."
      },
      {
        "number": "6",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply, provided by the on-chip regulator unless REGOFF selects regulator-off mode; 1 µF and 470 pF decoupling capacitors in parallel to ground should be used."
      },
      {
        "number": "7",
        "name": "RXCLK/PHYAD1",
        "type": "output",
        "description": "In MII mode this is the receive clock output at 25 MHz (100BASE-TX) or 2.5 MHz (10BASE-T); the PHYAD1 strap sets SMI address bit 1."
      },
      {
        "number": "8",
        "name": "RXD3/PHYAD2",
        "type": "output",
        "description": "MII receive data bit 3 of 4, sent by the transceiver on the receive path and not used in RMII mode; the PHYAD2 strap sets SMI address bit 2."
      },
      {
        "number": "9",
        "name": "RXD2/RMIISEL",
        "type": "output",
        "description": "MII receive data bit 2 of 4, not used in RMII mode; the RMIISEL strap selects MII when tied low to VSS and RMII when pulled high to VDDIO."
      },
      {
        "number": "10",
        "name": "RXD1/MODE1",
        "type": "output",
        "description": "Receive data bit 1 (2 bits in RMII mode) sent by the transceiver; the MODE1 strap combines with MODE0 and MODE2 to set the default PHY mode."
      },
      {
        "number": "11",
        "name": "RXD0/MODE0",
        "type": "output",
        "description": "Receive data bit 0 (2 bits in RMII mode) sent by the transceiver; the MODE0 strap combines with MODE1 and MODE2 to set the default PHY mode."
      },
      {
        "number": "12",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "13",
        "name": "RXER/RXD4/PHYAD0",
        "type": "output",
        "description": "Receive error output asserted when an error is detected in the frame being received; it is RXD4 (MSB of the 5-bit symbol) in symbol interface mode, and the PHYAD0 strap sets SMI address bit 0."
      },
      {
        "number": "14",
        "name": "CRS",
        "type": "output",
        "description": "MII mode carrier sense output that indicates detection of a carrier."
      },
      {
        "number": "15",
        "name": "COL/CRS_DV/MODE2",
        "type": "output",
        "description": "COL signals collision detection in MII mode, CRS_DV signals carrier sense/receive data valid in RMII mode, and the MODE2 strap combines with MODE0 and MODE1 to set the default PHY mode."
      },
      {
        "number": "16",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Serial Management Interface data input/output, with an internal 50 µA (typical) pull-up."
      },
      {
        "number": "17",
        "name": "MDC",
        "type": "input",
        "description": "Serial Management Interface clock input; the minimum time between MDC edges is 160 ns and the minimum cycle time is 400 ns."
      },
      {
        "number": "18",
        "name": "nINT/TXER/TXD4",
        "type": "bidirectional",
        "description": "Active-low interrupt output (open-drain, 8 mA sink) that needs an external pull-up to VDDIO; when nINTSEL is low it instead functions as the TXER/TXD4 transmit input."
      },
      {
        "number": "19",
        "name": "nRST",
        "type": "input",
        "description": "Active-low system reset input with an internal pull-up; configuration straps are latched on its deassertion."
      },
      {
        "number": "20",
        "name": "TXCLK",
        "type": "output",
        "description": "MII transmit clock used to latch data from the MAC, at 25 MHz for 100BASE-TX or 2.5 MHz for 10BASE-T; not used in RMII mode."
      },
      {
        "number": "21",
        "name": "TXEN",
        "type": "input",
        "description": "Indicates valid transmit data is present on TXD[3:0] (only TXD[1:0] in RMII mode); internal pull-down is enabled."
      },
      {
        "number": "22",
        "name": "TXD0",
        "type": "input",
        "description": "MAC transmit data bit 0 used in all modes; variable-voltage Schmitt-trigger input."
      },
      {
        "number": "23",
        "name": "TXD1",
        "type": "input",
        "description": "MAC transmit data bit 1 used in all modes; variable-voltage Schmitt-trigger input."
      },
      {
        "number": "24",
        "name": "TXD2",
        "type": "input",
        "description": "MII transmit data bit 2; must be grounded in RMII mode."
      },
      {
        "number": "25",
        "name": "TXD3",
        "type": "input",
        "description": "MII transmit data bit 3; must be grounded in RMII mode."
      },
      {
        "number": "26",
        "name": "RXDV",
        "type": "output",
        "description": "Indicates that recovered and decoded data is available on the RXD pins."
      },
      {
        "number": "27",
        "name": "VDD1A",
        "type": "power_in",
        "description": "+3.3 V channel 1 analog port power."
      },
      {
        "number": "28",
        "name": "TXN",
        "type": "bidirectional",
        "description": "Ethernet transmit/receive negative channel 1 analog differential pin."
      },
      {
        "number": "29",
        "name": "TXP",
        "type": "bidirectional",
        "description": "Ethernet transmit/receive positive channel 1 analog differential pin."
      },
      {
        "number": "30",
        "name": "RXN",
        "type": "bidirectional",
        "description": "Ethernet transmit/receive negative channel 2 analog differential pin."
      },
      {
        "number": "31",
        "name": "RXP",
        "type": "bidirectional",
        "description": "Ethernet transmit/receive positive channel 2 analog differential pin."
      },
      {
        "number": "32",
        "name": "RBIAS",
        "type": "passive",
        "description": "Requires a 12.1 kΩ (1%) resistor to ground; nominal voltage is 1.2 V and the resistor dissipates about 1 mW."
      },
      {
        "number": "33",
        "name": "VSS",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The ordering code suffix '-EN-TR' is not explained in the supplied excerpt (ordering information is ; The exposed pad (VSS / common ground) is not given a numbered pin in Table 2-8 or Figure 2-1, so it ; Pin types for multi-function pins were chosen for the primary function and may need review: LED2/nIN",
          "exposed pad 33 added from the footprint",
          "5/33 pins cited to the wrong page (name found elsewhere): ['4:XTAL2@p11', '13:RXER/RXD4/PHYAD0@p9', '14:CRS@p10', '15:COL/CRS_DV/MODE2@p9']"
        ],
        "pages_sent": 30,
        "cost_usd": 0.1409,
        "at": "2026-10-30T16:44:55"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/fc8f71c8a5d12d9d1e53c9c3be1c93cb.pdf",
        "pages": 106,
        "sha256": "ccee0ad7a5977067",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lan8741a-en-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lan8741a-en-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cfaa8832c7287d49fc975b12e022ddde43645fc04aa071f14ca727df3f61648a",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "MQ",
      "source_page": 98,
      "D": {
        "nom_mm": 5.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E1": {
        "nom_mm": 5.0,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.9,
        "range_mm": [
          0.8,
          1.0
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "lan8741a-en-tr.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}