component
L6208D013TR
Public Made by Adomby adom
STMicroelectronics Motor Driver ICs, SO-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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L6208D013TR
STMicroelectronics · Motor Driver ICs · SO-24-300mil
L6208D013TR from STMicroelectronics, in a SO-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLOCK | input | Step clock input; the state machine makes one step on each rising edge. |
| 2 | CW/CCW | input | Selects direction of rotation: HIGH sets clockwise and LOW sets counterclockwise; if not used it must be connected to GND or +5 V. |
| 3 | SENSEA | power_in | Bridge A source pin that must be connected to power ground through a sensing power resistor. |
| 4 | RCA | passive | RC network pin; a parallel RC network connected between this pin and ground sets the current controller OFF-time of bridge A. |
| 5 | OUT1A | output | Bridge A output 1. |
| 6 | GND | power_in | Ground terminal; in the SO24 package these pins also conduct heat to the PCB. |
| 7 | GND | power_in | Ground terminal; in the SO24 package these pins also conduct heat to the PCB. |
| 8 | OUT1B | output | Bridge B output 1. |
| 9 | RCB | passive | RC network pin; a parallel RC network connected between this pin and ground sets the current controller OFF-time of bridge B. |
| 10 | SENSEB | power_in | Bridge B source pin that must be connected to power ground through a sensing power resistor. |
| 11 | VREFB | input | Bridge B current controller reference voltage; do not leave this pin open or connected to GND. |
| 12 | HALF/FULL | input | Step mode selector: HIGH logic level sets HALF STEP mode and LOW logic level sets FULL STEP mode; if not used it must be connected to GND or +5 V. |
| 13 | CONTROL | input | Decay mode selector: HIGH logic level sets SLOW DECAY mode and LOW logic level sets FAST DECAY mode; if not used it must be connected to GND or +5 V. |
| 14 | EN | input | Chip enable: LOW logic level switches off all power MOSFETs of both bridges; if not used it must be connected to +5 V through a resistor, and the datasheet recommends 100 K in the 2.2 K to 180 K range for the overcurrent protection output. |
| 15 | VBOOT | power_in | Bootstrap voltage needed for driving the upper power MOSFETs of both bridge A and bridge B. |
| 16 | OUT2B | output | Bridge B output 2. |
| 17 | VSB | power_in | Bridge B power supply voltage; it must be connected to the supply voltage together with pin VSA. |
| 18 | GND | power_in | Ground terminal; in the SO24 package this pin is also used for heat dissipation toward the PCB. |
| 19 | GND | power_in | Ground terminal; in the SO24 package this pin is also used for heat dissipation toward the PCB. |
| 20 | VSA | power_in | Bridge A power supply voltage; it must be connected to the supply voltage together with pin VSB. |
| 21 | OUT2A | output | Bridge A output 2. |
| 22 | VCP | output | Charge pump oscillator output. |
| 23 | RESET | input | Reset pin; LOW logic level restores the home state (state 1) of the phase sequence generator, and if not used it must be connected to +5 V. |
| 24 | VREFA | input | Bridge A current controller reference voltage; do not leave this pin open or connected to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-24-300mil |
| Category | Power Management ICs |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VS | 60 | V | VSA = VSB = VS | 4 | ||
| Differential voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB | VOD | 60 | V | VSA = VSB = VS = 60 V; VSENSEA = VSENSEB = GND | 4 | ||
| Input and enable voltage range | VIN, VEN | -0.3 | 7 | V | 4 | ||
| Voltage range at pins VREFA and VREFB | VREFA, VREFB | -0.3 | 7 | V | 4 | ||
| Voltage range at pins RCA and RCB | VRCA, VRCB | -0.3 | 7 | V | 4 | ||
| Voltage range at pins SENSEA and SENSEB | VSENSEA, VSENSEB | -1 | 4 | V | 4 | ||
| Pulsed supply current (for each VS pin), internally limited by the overcurrent protection | IS(peak) | 7.1 | A | VSA = VSB = VS; tPULSE < 1 ms | 4 | ||
| RMS supply current (for each VS pin) | IS | 2.8 | A | VSA = VSB = VS | 4 | ||
| Storage and operating temperature range | Tstg, TOP | -40 | 150 | C | 4 | ||
| Supply voltage | VS | 8 | 52 | V | VSA = VSB = VS | 4 | |
| Differential voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB | VOD | 52 | V | VSA = VSB = VS; VSENSEA = VSENSEB | 4 | ||
| Voltage range at pins VREFA and VREFB | VREFA, VREFB | -0.1 | 5 | V | 4 | ||
| Voltage range at pins SENSEA and SENSEB | VSENSEA, VSENSEB | -6 | 6 | V | pulsed tW < trr | 4 | |
| Voltage range at pins SENSEA and SENSEB | VSENSEA, VSENSEB | -1 | 1 | V | DC | 4 | |
| RMS output current | IOUT | 2.8 | A | 4 | |||
| Switching frequency | fsw | 100 | KHz | 4 | |||
| Maximum thermal resistance junction pins | Rth-j-pins | 14 | C/W | 5 | |||
| Maximum thermal resistance junction ambient (mounted on multilayer FR4 PCB with dissipating copper surface on bottom side of 6 cm2) | Rth-j-amb1 | 51 | C/W | Mounted on multilayer FR4 PCB with dissipating copper surface on bottom side of 6 cm2 (35 µm thickness) | 5 | ||
| Maximum thermal resistance junction ambient (mounted on multilayer FR4 PCB without any heat sinking surface) | Rth-j-amb2 | 77 | C/W | Mounted on multilayer FR4 PCB without any heat sinking surface on the board | 5 | ||
| Turn-on threshold | VSth(ON) | 6.6 | 7 | 7.4 | V | 8 | |
| Turn-off threshold | VSth(OFF) | 5.6 | 6 | 6.4 | V | 8 | |
| Quiescent supply current | IS | 5 | 10 | mA | All bridges OFF; Tj = -25 °C to 125 °C | 8 | |
| Thermal shutdown temperature | Tj(OFF) | 165 | C | 8 | |||
| High-side switch ON resistance | RDS(ON) | 0.34 | 0.4 | Ω | Tj = 25 °C | 8 | |
| High-side switch ON resistance | RDS(ON) | 0.53 | 0.59 | Ω | Tj = 125 °C | 8 | |
| Low-side switch ON resistance | RDS(ON) | 0.28 | 0.34 | Ω | Tj = 25 °C | 8 | |
| Low-side switch ON resistance | RDS(ON) | 0.47 | 0.53 | Ω | Tj = 125 °C | 8 | |
| Leakage current | IDSS | 2 | mA | EN = low; OUT = VS | 8 | ||
| Leakage current | IDSS | -0.15 | mA | EN = low; OUT = GND | 8 | ||
| Forward ON voltage | VSD | 1.15 | 1.3 | V | ISD = 2.8 A, EN = LOW | 8 | |
| Forward recovery time | tfr | 200 | ns | 8 | |||
| Low level logic input voltage | VIL | -0.3 | 0.8 | V | 8 | ||
| High level logic input voltage | VIH | 2 | 7 | V | 8 | ||
| Low level logic input current | IIL | -10 | µA | GND logic input voltage | 8 | ||
| High level logic input current | IIH | 10 | µA | 7 V logic input voltage | 8 | ||
| Turn-on input threshold | Vth(ON) | 1.8 | 2 | V | 8 | ||
| Turn-off input threshold | Vth(OFF) | 0.8 | 1.3 | V | 8 | ||
| Enable to output turn-on delay time | tD(ON)EN | 100 | 250 | 400 | ns | ILOAD = 2.8 A, resistive load | 8 |
| Enable to output turn-off delay time | tD(OFF)EN | 300 | 550 | 800 | ns | ILOAD = 2.8 A, resistive load | 8 |
| Output rise time | tRISE | 40 | 250 | ns | ILOAD = 2.8 A, resistive load | 8 | |
| Output fall time | tFALL | 40 | 250 | ns | ILOAD = 2.8 A, resistive load | 8 | |
| Clock frequency | fCLK | 100 | KHz | 9 | |||
| Minimum setup time | tS(MIN) | 1 | µs | 9 | |||
| Deadtime protection | tDT | 0.5 | 1 | µs | 9 | ||
| Charge pump frequency | fCP | 0.6 | 1 | MHz | Tj = -25 °C to 125 °C | 9 | |
| Source current at pins RCA and RCB | IRCA, IRCB | 3.5 | 5.5 | mA | VRCA = VRCB = 2.5 V | 9 | |
| Offset voltage on sense comparator | Voffset | -5 | 5 | mV | VREFA, VREFB = 0.5 V | 9 | |
| Turn OFF propagation delay | tPROP | 500 | ns | 9 | |||
| Minimum On time | tON(MIN) | 1.5 | 2 | µs | 9 | ||
| Input bias current at pins VREFA and VREFB | IBIAS | 10 | µA | 9 | |||
| Input supply overcurrent protection threshold | ISOVER | 4 | 5.6 | 7.1 | A | Tj = -25 °C to 125 °C | 9 |
| Open drain ON resistance | ROPDR | 40 | 60 | Ω | I = 4 mA | 9 | |
| Clock to output delay time | tDCLK | 2 | µs | ILOAD = 2.8 A, resistive load | 9 | ||
| Reverse recovery time | trr | 300 | ns | If = 2.8 A | 8 | ||
| Internal blanking time on SENSE pins | tBLANK | 1 | µs | 9 | |||
| PWM recirculation time | tOFF | 13 | µs | ROFF = 20 K, COFF = 1 nF | 9 | ||
| PWM recirculation time | tOFF | 61 | µs | ROFF = 100 K, COFF = 1 nF | 9 | ||
| OCD turn-on delay time | tOCD(ON) | 200 | ns | I = 4 mA; CEN < 100 pF | 9 | ||
| OCD turn-off delay time | tOCD(OFF) | 100 | ns | I = 4 mA; CEN < 100 pF | 9 |
CAD (KiCad official)
- Symbol:
L6208D013TR - Footprint:
Package_SO:SO-24_5.3x15mm_P1.27mm - 3D model: SO-24-300mil (KiCad packages3D, STEP)
- 3D model files:
l6208d013tr-etched.step/l6208d013tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l6208d013tr.step/l6208d013tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (34 pp, sha256
d8b05562bf5eb4e1, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).