component
L5991AD
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "STMicroelectronics AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"l5991ad",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"path": "docs/hero.png"
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"files": [
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],
"component": {
"mpn": "L5991AD",
"manufacturer": "STMicroelectronics",
"package": "SOIC-16",
"pin_count": 16,
"category": "Power Management (PMIC)",
"subcategory": "AC-DC Controllers And Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194053762830336",
"parts": {
"symbol": "l5991ad.kicad_sym",
"footprint": "l5991ad.kicad_mod",
"model_3d": "l5991ad-hero.glb",
"model_3d_plain": "l5991ad.glb",
"model_3d_step": "l5991ad-etched.step",
"model_3d_step_plain": "l5991ad.step",
"lbr": "l5991ad.lbr"
},
"distributor_links": {
"lcsc": "C10655",
"digikey": "497-L5991AD-ND",
"mouser": "511-L5991AD"
},
"distributor_check": {
"checked_at": "2026-10-05T22:05:43Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-L5991AD-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "511-L5991AD",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SYNC",
"type": "bidirectional",
"description": "Synchronization pin operating as clock output in master mode (7mA typical source capability, 4V amplitude) or edge-triggered slave input for external frequency synchronization."
},
{
"number": "2",
"name": "RCT",
"type": "bidirectional",
"description": "Oscillator timing node connected to external RC network for frequency control; internal circuit charges and discharges timing capacitor between 1V valley and 3V peak."
},
{
"number": "3",
"name": "DC",
"type": "input",
"description": "Duty cycle control input; voltage 1-3V sets maximum duty cycle between 0% and upper limit Dx, <1V inhibits output, floating or >3V selects maximum."
},
{
"number": "4",
"name": "VREF",
"type": "power_out",
"description": "5.0V±1.5% reference voltage output (0.4mV/°C temperature coefficient, 2mV line regulation, 2mV load regulation at 1-10mA output current)."
},
{
"number": "5",
"name": "VFB",
"type": "input",
"description": "Error amplifier inverting input for feedback signal; compared to internal 2.5V reference with 60-90dB open-loop gain and 1.7-4MHz unity-gain bandwidth."
},
{
"number": "6",
"name": "COMP",
"type": "output",
"description": "Error amplifier output for frequency compensation network connection; voltage monitored for standby frequency reduction at light load."
},
{
"number": "7",
"name": "SS",
"type": "output",
"description": "Soft-start control pin; external capacitor charged by 14-26µA current source (at 25°C) ramping to 7V clamp voltage for smooth power-up."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Signal circuit supply; 7.8-9V startup threshold (L5991A) with 7-8.2V minimum operating voltage (L5991A) and internal 25V zener clamp."
},
{
"number": "9",
"name": "VC",
"type": "power_in",
"description": "Power stage driver supply that absorbs pulsed current when driving external switch gate; buffer capacitor recommended near IC."
},
{
"number": "10",
"name": "OUT",
"type": "output",
"description": "Totem-pole driver output to external power switch; 1.6A peak source (NPN Darlington), 2A peak sink (VDMOS), 13V internal gate clamp, 20-100ns rise/fall time."
},
{
"number": "11",
"name": "PGND",
"type": "power_in",
"description": "Power ground; return path for pulsed gate drive current loop to external switch."
},
{
"number": "12",
"name": "SGND",
"type": "power_in",
"description": "Signal ground; reference point for all control circuitry and external control signal returns."
},
{
"number": "13",
"name": "ISEN",
"type": "input",
"description": "Current sense input from external resistor hot lead; 100ns internal leading-edge blanking, 1.1-1.3V fault threshold, 2.85-3.15V/V transfer gain."
},
{
"number": "14",
"name": "DIS",
"type": "input",
"description": "Device disable control input; threshold >2.5V triggers shutdown with restart requiring VCC below UVLO, must be tied to SGND if unused."
},
{
"number": "15",
"name": "DC-LIM",
"type": "input",
"description": "Duty cycle limit control; connection to VREF sets maximum duty cycle to approximately 50%, floating or grounded allows full maximum duty cycle."
},
{
"number": "16",
"name": "ST-BY",
"type": "input",
"description": "Standby mode control input; resistor RB to RCT pin sets normal frequency (fosc), connect to VREF or leave floating to enable light-load mode (<13% rated power)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: All pin specifications extracted from PIN FUNCTIONS table and PIN CONNECTION diagram on page 2 of da"
],
"pages_sent": 19,
"cost_usd": 0.1735,
"at": "2026-10-05T22:05:26"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194053762830336",
"pages": 19,
"sha256": "a0e39653f17acfa3",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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}