KSZ9897RTXI

{
  "slug": "ksz9897rtxi",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Interface - Specialized, TQFP-128(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "ksz9897rtxi",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ksz9897rtxi.kicad_sym",
    "ksz9897rtxi.kicad_mod",
    "ksz9897rtxi.glb",
    "ksz9897rtxi.step",
    "ksz9897rtxi.lbr",
    "docs/hero.png",
    "docs/ksz9897rtxi-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ksz9897rtxi-hero.glb",
    "ksz9897rtxi-hero.overlay.json",
    "ksz9897rtxi-etched.glb"
  ],
  "component": {
    "mpn": "KSZ9897RTXI",
    "manufacturer": "Microchip Tech",
    "package": "TQFP-128(14x14)",
    "pin_count": 128,
    "category": "Interface",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042242325516288",
    "parts": {
      "symbol": "ksz9897rtxi.kicad_sym",
      "footprint": "ksz9897rtxi.kicad_mod",
      "model_3d": "ksz9897rtxi-hero.glb",
      "model_3d_plain": "ksz9897rtxi-etched.glb",
      "model_3d_step": "ksz9897rtxi-etched.step",
      "model_3d_step_plain": "ksz9897rtxi.step",
      "lbr": "ksz9897rtxi.lbr"
    },
    "distributor_links": {
      "lcsc": "C638299",
      "digikey": "KSZ9897RTXI-ND",
      "mouser": "579-KSZ9897RTXI"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T10:29:18Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "KSZ9897RTXI-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "579-KSZ9897RTXI",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TXRX1P_A",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair A (+); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "2",
        "name": "TXRX1M_A",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair A (-); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "3",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "4",
        "name": "TXRX1P_B",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair B (+)."
      },
      {
        "number": "5",
        "name": "TXRX1M_B",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair B (-)."
      },
      {
        "number": "6",
        "name": "TXRX1P_C",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair C (+)."
      },
      {
        "number": "7",
        "name": "TXRX1M_C",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair C (-)."
      },
      {
        "number": "8",
        "name": "TXRX1P_D",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair D (+)."
      },
      {
        "number": "9",
        "name": "TXRX1M_D",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair D (-)."
      },
      {
        "number": "10",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "11",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "12",
        "name": "TXRX2P_A",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair A (+); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "13",
        "name": "TXRX2M_A",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair A (-); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "14",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "15",
        "name": "TXRX2P_B",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair B (+)."
      },
      {
        "number": "16",
        "name": "TXRX2M_B",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair B (-)."
      },
      {
        "number": "17",
        "name": "TXRX2P_C",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair C (+)."
      },
      {
        "number": "18",
        "name": "TXRX2M_C",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair C (-)."
      },
      {
        "number": "19",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "20",
        "name": "TXRX2P_D",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair D (+)."
      },
      {
        "number": "21",
        "name": "TXRX2M_D",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair D (-)."
      },
      {
        "number": "22",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "23",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "24",
        "name": "TXRX3P_A",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair A (+); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "25",
        "name": "TXRX3M_A",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair A (-); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "26",
        "name": "TXRX3P_B",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair B (+)."
      },
      {
        "number": "27",
        "name": "TXRX3M_B",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair B (-)."
      },
      {
        "number": "28",
        "name": "TXRX3P_C",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair C (+)."
      },
      {
        "number": "29",
        "name": "TXRX3M_C",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair C (-)."
      },
      {
        "number": "30",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "31",
        "name": "TXRX3P_D",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair D (+)."
      },
      {
        "number": "32",
        "name": "TXRX3M_D",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair D (-)."
      },
      {
        "number": "33",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "34",
        "name": "TXRX4P_A",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair A (+); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "35",
        "name": "TXRX4M_A",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair A (-); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "36",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "37",
        "name": "TXRX4P_B",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair B (+)."
      },
      {
        "number": "38",
        "name": "TXRX4M_B",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair B (-)."
      },
      {
        "number": "39",
        "name": "TXRX4P_C",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair C (+)."
      },
      {
        "number": "40",
        "name": "TXRX4M_C",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair C (-)."
      },
      {
        "number": "41",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "42",
        "name": "TXRX4P_D",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair D (+)."
      },
      {
        "number": "43",
        "name": "TXRX4M_D",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair D (-)."
      },
      {
        "number": "44",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "45",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "46",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "47",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "48",
        "name": "TX_CLK6/REFCLKI6",
        "type": "bidirectional",
        "description": "Port 6 MII transmit clock (25/2.5MHz, output in PHY mode, input in MAC mode), RMII 50MHz reference clock input in Normal mode, or RGMII 125/25/2.5MHz transmit clock input."
      },
      {
        "number": "49",
        "name": "TX_EN6/TX_CTL6",
        "type": "input",
        "description": "Port 6 MII/RMII Transmit Enable input, or RGMII Transmit Control input."
      },
      {
        "number": "50",
        "name": "TX_ER6",
        "type": "input",
        "description": "Port 6 MII transmit error input; not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "51",
        "name": "COL6",
        "type": "bidirectional",
        "description": "Port 6 MII collision detect (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "52",
        "name": "TXD6_3",
        "type": "input",
        "description": "Port 6 MII/RGMII transmit data bit 3; not used in RMII mode and must not be connected in that mode."
      },
      {
        "number": "53",
        "name": "TXD6_2",
        "type": "input",
        "description": "Port 6 MII/RGMII transmit data bit 2; not used in RMII mode and must not be connected in that mode."
      },
      {
        "number": "54",
        "name": "TXD6_1",
        "type": "input",
        "description": "Port 6 MII/RMII/RGMII transmit data bit 1."
      },
      {
        "number": "55",
        "name": "TXD6_0",
        "type": "input",
        "description": "Port 6 MII/RMII/RGMII transmit data bit 0."
      },
      {
        "number": "56",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "57",
        "name": "RX_CLK6/REFCLKO6",
        "type": "bidirectional",
        "description": "Port 6 MII receive clock (25/2.5MHz, output in PHY mode, input in MAC mode), RMII 50MHz reference clock output in Clock mode, or RGMII 125/25/2.5MHz receive clock output."
      },
      {
        "number": "58",
        "name": "RX_DV6/CRS_DV6/RX_CTL6",
        "type": "bidirectional",
        "description": "Port 6 MII Receive Data Valid output, RMII Carrier Sense/Receive Data Valid output, or RGMII Receive Control output."
      },
      {
        "number": "59",
        "name": "RX_ER6",
        "type": "bidirectional",
        "description": "Port 6 MII receive error output; not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "60",
        "name": "CRS6",
        "type": "bidirectional",
        "description": "Port 6 MII carrier sense (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "61",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/O pins."
      },
      {
        "number": "62",
        "name": "RXD6_3",
        "type": "bidirectional",
        "description": "Port 6 MII/RGMII receive data bit 3; configuration strap pin (Port 6 mode with RXD6_2) sampled at reset."
      },
      {
        "number": "63",
        "name": "RXD6_2",
        "type": "bidirectional",
        "description": "Port 6 MII/RGMII receive data bit 2; configuration strap pin (Port 6 mode with RXD6_3) sampled at reset."
      },
      {
        "number": "64",
        "name": "RXD6_1",
        "type": "bidirectional",
        "description": "Port 6 MII/RMII/RGMII receive data bit 1; configuration strap pin (Port 6 MII/RMII PHY or MAC mode) sampled at reset."
      },
      {
        "number": "65",
        "name": "RXD6_0",
        "type": "bidirectional",
        "description": "Port 6 MII/RMII/RGMII receive data bit 0; configuration strap pin (Port 6 speed select) sampled at reset."
      },
      {
        "number": "66",
        "name": "TX_CLK7/REFCLKI7",
        "type": "bidirectional",
        "description": "Port 7 MII transmit clock (25/2.5MHz, output in PHY mode, input in MAC mode), RMII 50MHz reference clock input in Normal mode, or RGMII 125/25/2.5MHz transmit clock input."
      },
      {
        "number": "67",
        "name": "TX_EN7/TX_CTL7",
        "type": "input",
        "description": "Port 7 MII/RMII Transmit Enable input, or RGMII Transmit Control input."
      },
      {
        "number": "68",
        "name": "TX_ER7",
        "type": "input",
        "description": "Port 7 MII transmit error input; not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "69",
        "name": "COL7",
        "type": "bidirectional",
        "description": "Port 7 MII collision detect (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "70",
        "name": "TXD7_3",
        "type": "input",
        "description": "Port 7 MII/RGMII transmit data bit 3; not used in RMII mode and must not be connected in that mode."
      },
      {
        "number": "71",
        "name": "TXD7_2",
        "type": "input",
        "description": "Port 7 MII/RGMII transmit data bit 2; not used in RMII mode and must not be connected in that mode."
      },
      {
        "number": "72",
        "name": "TXD7_1",
        "type": "input",
        "description": "Port 7 MII/RMII/RGMII transmit data bit 1."
      },
      {
        "number": "73",
        "name": "TXD7_0",
        "type": "input",
        "description": "Port 7 MII/RMII/RGMII transmit data bit 0."
      },
      {
        "number": "74",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "75",
        "name": "RX_CLK7/REFCLKO7",
        "type": "bidirectional",
        "description": "Port 7 MII receive clock (25/2.5MHz, output in PHY mode, input in MAC mode), RMII 50MHz reference clock output in Clock mode, or RGMII 125/25/2.5MHz receive clock output."
      },
      {
        "number": "76",
        "name": "RX_DV7/CRS_DV7/RX_CTL7",
        "type": "bidirectional",
        "description": "Port 7 MII Receive Data Valid output, RMII Carrier Sense/Receive Data Valid output, or RGMII Receive Control output; configuration strap pin that enables In-Band Management when high at reset."
      },
      {
        "number": "77",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/O pins."
      },
      {
        "number": "78",
        "name": "RX_ER7",
        "type": "bidirectional",
        "description": "Port 7 MII receive error output; not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "79",
        "name": "CRS7",
        "type": "bidirectional",
        "description": "Port 7 MII carrier sense (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and must not be connected in those modes."
      },
      {
        "number": "80",
        "name": "RXD7_3",
        "type": "bidirectional",
        "description": "Port 7 MII/RGMII receive data bit 3; configuration strap pin (Port 7 mode with RXD7_2) sampled at reset."
      },
      {
        "number": "81",
        "name": "RXD7_2",
        "type": "bidirectional",
        "description": "Port 7 MII/RGMII receive data bit 2; configuration strap pin (Port 7 mode with RXD7_3) sampled at reset."
      },
      {
        "number": "82",
        "name": "RXD7_1",
        "type": "bidirectional",
        "description": "Port 7 MII/RMII/RGMII receive data bit 1; configuration strap pin (Port 7 MII/RMII PHY or MAC mode) sampled at reset."
      },
      {
        "number": "83",
        "name": "RXD7_0",
        "type": "bidirectional",
        "description": "Port 7 MII/RMII/RGMII receive data bit 0; configuration strap pin (Port 7 speed select) sampled at reset."
      },
      {
        "number": "84",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "85",
        "name": "LED4_0",
        "type": "bidirectional",
        "description": "Port 4 LED indicator 0, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "86",
        "name": "LED4_1",
        "type": "bidirectional",
        "description": "Port 4 LED indicator 1, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "87",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "88",
        "name": "LED3_0",
        "type": "bidirectional",
        "description": "Port 3 LED indicator 0, active low sink output for an external LED."
      },
      {
        "number": "89",
        "name": "LED3_1",
        "type": "bidirectional",
        "description": "Port 3 LED indicator 1, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "90",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; must be left unconnected for proper operation."
      },
      {
        "number": "91",
        "name": "LED2_0",
        "type": "bidirectional",
        "description": "Port 2 LED indicator 0, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "92",
        "name": "LED2_1",
        "type": "bidirectional",
        "description": "Port 2 LED indicator 1, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "93",
        "name": "PME_N",
        "type": "output",
        "description": "Power management event output that signals an energy detect event to wake the system; polarity is programmable (default active low) and requires an external pull-up for active-low operation."
      },
      {
        "number": "94",
        "name": "INTRP_N",
        "type": "output",
        "description": "Active low, open-drain interrupt output that requires an external pull-up resistor."
      },
      {
        "number": "95",
        "name": "CLKO_25_125",
        "type": "output",
        "description": "25/125MHz reference clock output derived from the crystal input, powered from VDDIO and可 disabled when not needed."
      },
      {
        "number": "96",
        "name": "RESET_N",
        "type": "input",
        "description": "Active low system reset that must be asserted during or after power-on; an RC circuit is suggested for power-on reset."
      },
      {
        "number": "97",
        "name": "SDO",
        "type": "output",
        "description": "SPI data out (MISO); not used in I2C or MIIM modes."
      },
      {
        "number": "98",
        "name": "SDI/SDA/MDIO",
        "type": "bidirectional",
        "description": "SPI data in (SDI), I2C data (SDA) or MIIM data (MDIO); open-drain when outputting and requires an external 1.0kΩ to 4.7kΩ pull-up to VDDIO."
      },
      {
        "number": "99",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/O pins."
      },
      {
        "number": "100",
        "name": "SCS_N",
        "type": "input",
        "description": "SPI chip select, active low; not used in I2C or MIIM modes."
      },
      {
        "number": "101",
        "name": "SCL/MDC",
        "type": "input",
        "description": "SPI/I2C serial clock (SCL) or MIIM serial clock (MDC) input from the host."
      },
      {
        "number": "102",
        "name": "LED5_0",
        "type": "bidirectional",
        "description": "Port 5 LED indicator 0, active low sink output for an external LED."
      },
      {
        "number": "103",
        "name": "LED5_1",
        "type": "bidirectional",
        "description": "Port 5 LED indicator 1, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "104",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "105",
        "name": "LED1_0",
        "type": "bidirectional",
        "description": "Port 1 LED indicator 0, active low sink output for an external LED."
      },
      {
        "number": "106",
        "name": "LED1_1",
        "type": "bidirectional",
        "description": "Port 1 LED indicator 1, active low sink output for an external LED; configuration strap pin sampled at reset."
      },
      {
        "number": "107",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "108",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; must be left unconnected for proper operation."
      },
      {
        "number": "109",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "110",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "111",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "112",
        "name": "TXRX5P_A",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair A (+); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "113",
        "name": "TXRX5M_A",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair A (-); 100BASE-TX and 10BASE-Te are also supported on pairs A and B."
      },
      {
        "number": "114",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "115",
        "name": "TXRX5P_B",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair B (+)."
      },
      {
        "number": "116",
        "name": "TXRX5M_B",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair B (-)."
      },
      {
        "number": "117",
        "name": "TXRX5P_C",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair C (+)."
      },
      {
        "number": "118",
        "name": "TXRX5M_C",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair C (-)."
      },
      {
        "number": "119",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "120",
        "name": "TXRX5P_D",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair D (+)."
      },
      {
        "number": "121",
        "name": "TXRX5M_D",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair D (-)."
      },
      {
        "number": "122",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      },
      {
        "number": "123",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "124",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "125",
        "name": "XO",
        "type": "output",
        "description": "Crystal clock output connected to one lead of a 25MHz crystal; left unconnected when an external oscillator drives XI."
      },
      {
        "number": "126",
        "name": "XI",
        "type": "input",
        "description": "25MHz crystal or oscillator clock input with a required tolerance of ±50ppm."
      },
      {
        "number": "127",
        "name": "ISET",
        "type": "passive",
        "description": "Transmit output current set resistor; must be connected to GND through a 6.04kΩ 1% resistor."
      },
      {
        "number": "128",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed pad (must be connected to GND with a via field) is not a numbered pin on the package, so; Buffer types were mapped from Microchip codes to KiCad ERC classes by inference: AIO and analog pins; Pins 90 and 108 are printed as NC and must be left unconnected. No other pin is marked NC in Table 3",
          "60/128 pins cited to the wrong page (name found elsewhere): ['19:AVDDL@p15', '22:AVDDH@p15', '23:DVDDL@p15', '30:AVDDL@p15']"
        ],
        "pages_sent": 50,
        "cost_usd": 0.3095,
        "at": "2026-10-20T10:28:39"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042242325516288",
        "pages": 196,
        "sha256": "72b89179ed6a42a7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 128,
        "described": 128,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ksz9897rtxi.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16.0,
          16.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b8d257b30f25cdf1e0f6a8c639d98f6174f71f83f9b50ea0ca10c4bbb58ee28",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ksz9897rtxi-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16.0,
          16.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "fe6f04d32c3f45dbc3357bf6f02622564aab28e95943293dad8b780aa353450f",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}