KiCad - the KiCad Bridge
Public Made by Adomby adom
Drive your own KiCad from an AI, in the background: open every editor, read the whole board as data (the EDA Bridge Standard board model), stack-up, part heights, netlists, place, route, pour, DRC and exports.
Design rules by fab: consume adom/pcb-design-rules
Design rules by fab: consume adom/pcb-design-rules
The canonical per-vendor design-rules page is live: adom/pcb-design-rules (https://wiki.adom.inc/adom/pcb-design-rules). This issue asks the bridge thread to wire it into the KiCad rule-loading path, same idea as the Fusion-side ask on adom/fusion-bridge (Rust port Phase 2): a rule change should be a wiki publish, not a bridge release.
Files to consume
Machine-readable index (vendor, process, layerCount to files): https://wiki.adom.inc/adom/pcb-design-rules/render/rules/index.json
Per vendor, process and layer count the page generates:
kicad/<slug>[-<process>]-<layers>L.kicad_dru, the KiCad custom rules file (place next to the board as<projectname>.kicad_dru)kicad/<slug>[-<process>]-<layers>L.board-setup.json, the same limits as Board Setup constraints for bridges that edit board setup directly
URL pattern:
https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/<slug>[-<process>]-<layers>L.kicad_dru
Examples (all live now):
- https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/adom-instapcb-2L.kicad_dru
- https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/jlcpcb-2L.kicad_dru
- https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/jlcpcb-4L.kicad_dru
- https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/pcbway-2L.kicad_dru
- https://wiki.adom.inc/adom/pcb-design-rules/render/kicad/pcbway-4L.kicad_dru
Proposed shape
A kicad_set_design_rules {fab, layers, druPath?} (or extend
kicad_run_drc with a druUrl/druPath argument) that resolves the page
file for (fab, layers) or takes a local override, stages it next to the
board, and runs DRC. InstaPCB is the house baseline and should be first in
any fab list.
Already verified (2026-09-03, KiCad 10.0 on AdomLapper via this bridge)
kicad_lint_board on a test board with a 0.05 mm track, with
jlcpcb-2L.kicad_dru beside it: error "Track width (rule 'min-track-width'
min width 0.1000 mm; actual 0.0500 mm)" naming the page's custom rule.
Discriminating control with a 0.15 mm track: 0 errors with the rules file,
and without it the default board constraints flagged the same track at
0.2 mm. kicad_run_drc on the open board repeated the clean result.
Screenshot and full log: Verification section of adom/pcb-design-rules.
Notes
- 13 vendors, 56 records (vendor, process, layer count); every number cites the vendor's own capabilities page and the read date.
- Altium
.RULexports also exist on the page (unverified against a live Altium import) if the future altium bridge wants the same contract.