ISL81801FRTZ-T

{
  "slug": "isl81801frtz-t",
  "version": "0.1.0",
  "type": "component",
  "description": "RENESAS DC-DC Converters, TQFN-32(5X5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power supply chip",
    "isl81801frtz-t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "isl81801frtz-t.kicad_sym",
    "isl81801frtz-t.kicad_mod",
    "isl81801frtz-t.glb",
    "isl81801frtz-t.step",
    "isl81801frtz-t.lbr",
    "docs/hero.png",
    "docs/isl81801frtz-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "isl81801frtz-t-hero.glb",
    "isl81801frtz-t-hero.overlay.json",
    "isl81801frtz-t-etched.glb"
  ],
  "component": {
    "mpn": "ISL81801FRTZ-T",
    "manufacturer": "RENESAS",
    "package": "TQFN-32(5X5)",
    "pin_count": 33,
    "category": "Power Supply Chip",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/2d641618bcf145e25deeecafacf82508.pdf",
    "parts": {
      "symbol": "isl81801frtz-t.kicad_sym",
      "footprint": "isl81801frtz-t.kicad_mod",
      "model_3d": "isl81801frtz-t-hero.glb",
      "model_3d_plain": "isl81801frtz-t-etched.glb",
      "model_3d_step": "isl81801frtz-t-etched.step",
      "model_3d_step_plain": "isl81801frtz-t.step",
      "lbr": "isl81801frtz-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C5340024",
      "digikey": "20-ISL81801FRTZ-TTR-ND",
      "mouser": "968-ISL81801FRTZ-T"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T03:26:14Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "20-ISL81801FRTZ-TTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "968-ISL81801FRTZ-T",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BSTEN",
        "type": "bidirectional",
        "description": "DE Burst mode enable signal, pulled up to 5V by an internal 250k resistor in PWM and DE mode and pulled low in Burst mode; tie together across chips in parallel operation."
      },
      {
        "number": "2",
        "name": "FB_IN",
        "type": "input",
        "description": "Input voltage feedback for reverse direction operation, regulated to 0.8V; keep below 0.3V to disable reverse operation, or tie to VCC5V or SGND if unused to set interleave phase shift."
      },
      {
        "number": "3",
        "name": "VCC5V",
        "type": "power_out",
        "description": "Output of the internal 5V linear regulator that biases the IC; must be decoupled to SGND with at least 4.7µF ceramic capacitor."
      },
      {
        "number": "4",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection pin."
      },
      {
        "number": "5",
        "name": "RT/SYNC",
        "type": "input",
        "description": "Resistor to ground sets switching frequency from 100kHz to 600kHz (open or tied to VCC5V gives 120kHz, tied to GND gives 575kHz); also accepts an external clock for synchronization."
      },
      {
        "number": "6",
        "name": "PLL_COMP",
        "type": "passive",
        "description": "Compensation pin for the internal PLL; RPLL 2.7kΩ, CPLL1 10nF and CPLL2 820pF network is recommended."
      },
      {
        "number": "7",
        "name": "CLKOUT/DITHER",
        "type": "bidirectional",
        "description": "With no capacitor it outputs a clock to synchronize other ISL81801s; with a capacitor the clock out is disabled and frequency dither of ±15% is enabled."
      },
      {
        "number": "8",
        "name": "SS/TRK",
        "type": "input",
        "description": "Soft-start capacitor pin charged by a regulated 2µA source, or tracking input from a master supply via a resistor divider."
      },
      {
        "number": "9",
        "name": "COMP",
        "type": "output",
        "description": "Voltage error GM amplifier output that sets the inner current loop reference; duty cycle reduces to 0% when pulled below 1V."
      },
      {
        "number": "10",
        "name": "FB_OUT",
        "type": "input",
        "description": "Output voltage feedback input regulated to the internal 0.8V reference via a resistive divider to SGND."
      },
      {
        "number": "11",
        "name": "IMON_OUT",
        "type": "output",
        "description": "Output current monitor with current proportional to ISEN+ minus ISEN- voltage; average current limit acts at 1.2V and Burst mode threshold is about 850mV/880mV."
      },
      {
        "number": "12",
        "name": "OV",
        "type": "bidirectional",
        "description": "OVP comparator signal pulled low by an internal 250k resistor in normal operation and pulled high when output OVP trips; connect together in parallel operation."
      },
      {
        "number": "13",
        "name": "ISEN-",
        "type": "input",
        "description": "Output current sense signal negative input pin."
      },
      {
        "number": "14",
        "name": "ISEN+",
        "type": "input",
        "description": "Output current sense signal positive input pin."
      },
      {
        "number": "15",
        "name": "PGOOD",
        "type": "output",
        "description": "Open-drain power good output pulled low when output is not within ±10% of nominal or EN is low."
      },
      {
        "number": "16",
        "name": "UG2",
        "type": "output",
        "description": "High-side MOSFET gate driver output controlled by the boost PWM signal."
      },
      {
        "number": "17",
        "name": "PHASE2",
        "type": "passive",
        "description": "Phase node of the boost converter, connected to the junction of upper MOSFET source, inductor and lower MOSFET drain."
      },
      {
        "number": "18",
        "name": "BOOT2",
        "type": "passive",
        "description": "Bootstrap pin for the boost high-side driver with a bootstrap diode to VDD; refresh pulse is issued when BOOT2-PHASE2 drops to 5.95V."
      },
      {
        "number": "19",
        "name": "LG2/OC_MODE",
        "type": "bidirectional",
        "description": "Low-side boost gate driver output and OCP mode set pin; at initialization 10µA sets voltage, below 0.3V gives constant current mode and above 0.3V gives Hiccup mode."
      },
      {
        "number": "20",
        "name": "VDD",
        "type": "power_out",
        "description": "Output of the internal 8V linear regulator supplied by VIN or EXTBIAS for low-side drivers and boot circuitry; decouple to PGND with at least 4.7µF."
      },
      {
        "number": "21",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground connected to the sources of the lower MOSFETs and the negative terminals of the VDD decoupling capacitors."
      },
      {
        "number": "22",
        "name": "LG1/PWM_MODE",
        "type": "bidirectional",
        "description": "Low-side buck gate driver output and PWM mode set pin; at initialization 10µA sets voltage, below 0.3V gives forced PWM mode and above 0.3V gives Diode Emulation mode."
      },
      {
        "number": "23",
        "name": "BOOT1",
        "type": "passive",
        "description": "Bootstrap pin for the buck high-side driver with a bootstrap diode to VDD; refresh pulse is issued when BOOT1-PHASE1 drops to 5.95V."
      },
      {
        "number": "24",
        "name": "PHASE1",
        "type": "passive",
        "description": "Phase node of the buck converter, connected to the junction of upper MOSFET source, inductor and lower MOSFET drain."
      },
      {
        "number": "25",
        "name": "UG1",
        "type": "output",
        "description": "High-side MOSFET gate driver output controlled by the buck PWM signal."
      },
      {
        "number": "26",
        "name": "EXTBIAS",
        "type": "power_in",
        "description": "External bias input for the optional VDD LDO, which disconnects the VIN LDO above 7.5V; decouple with 10µF when used, otherwise tie to ground, do not float."
      },
      {
        "number": "27",
        "name": "VIN",
        "type": "power_in",
        "description": "Input rail connection through a 5-10Ω resistor powering the internal VDD LDO, decoupled with 10nF to 1µF to ground; operating range 4.5V to 80V."
      },
      {
        "number": "28",
        "name": "CS+",
        "type": "input",
        "description": "Input current sense signal positive input pin."
      },
      {
        "number": "29",
        "name": "CS-",
        "type": "input",
        "description": "Input current sense signal negative input pin."
      },
      {
        "number": "30",
        "name": "EN/UVLO",
        "type": "input",
        "description": "Enable and accurate UVLO pin: LDOs activate at 1.3V and PWM is enabled at 1.8V, internally pulled up when floating, maximum current into pin 100µA."
      },
      {
        "number": "31",
        "name": "IMON_IN",
        "type": "bidirectional",
        "description": "Input current monitor with current proportional to CS+ minus CS- voltage and average current limit at 1.2V; tie to VCC5V or SGND if unused to set interleave phase shift."
      },
      {
        "number": "32",
        "name": "CLKEN",
        "type": "bidirectional",
        "description": "DE burst off-state enable signal pulled up to 5V by an internal 250k resistor and pulled low in Burst off state; tie together across chips in parallel operation."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The TQFN pin table gives SGND/EPAD a '-' pin number, so the exposed pad has no printed number. I lab; The datasheet doesn't state pin direction for these pins. I inferred the types (IMON_IN, CLKEN, BSTE"
        ],
        "pages_sent": 21,
        "cost_usd": 0.2711,
        "at": "2026-10-23T03:25:47"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/2d641618bcf145e25deeecafacf82508.pdf",
        "pages": 50,
        "sha256": "e51f11fea5d82478",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "isl81801frtz-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "isl81801frtz-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.0,
          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "aebc9a3e81775a659fb9671105443079c5fa4f0262492de605885e1db22af09d",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}