main
Ray Publish 0.1.0 44e9268 10d ago
{
  "slug": "isl6612acbz-t",
  "version": "0.1.0",
  "type": "component",
  "description": "RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "isl6612acbz-t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "isl6612acbz-t.kicad_sym",
    "isl6612acbz-t.kicad_mod",
    "isl6612acbz-t.glb",
    "isl6612acbz-t.step",
    "isl6612acbz-t.lbr",
    "docs/hero.png",
    "docs/isl6612acbz-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "isl6612acbz-t-hero.glb",
    "isl6612acbz-t-hero.overlay.json",
    "isl6612acbz-t-etched.glb"
  ],
  "component": {
    "mpn": "ISL6612ACBZ-T",
    "manufacturer": "RENESAS",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Interface ICs",
    "subcategory": "Pre-ordered Chips",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d4c39046a127629a5c71bd062f55cb32.pdf",
    "parts": {
      "symbol": "isl6612acbz-t.kicad_sym",
      "footprint": "isl6612acbz-t.kicad_mod",
      "model_3d": "isl6612acbz-t-hero.glb",
      "model_3d_plain": "isl6612acbz-t-etched.glb",
      "model_3d_step": "isl6612acbz-t-etched.step",
      "model_3d_step_plain": "isl6612acbz-t.step",
      "lbr": "isl6612acbz-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C2677039",
      "digikey": "ISL6612ACBZ-TTR-ND",
      "mouser": "968-ISL6612ACBZ-T"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T00:23:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ISL6612ACBZ-TTR-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "968-ISL6612ACBZ-T",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "UGATE",
        "type": "output",
        "description": "Upper gate drive output that connects to the gate of the high-side power N-Channel MOSFET, driven to 12V (VCC) in the ISL6612A."
      },
      {
        "number": "2",
        "name": "BOOT",
        "type": "power_out",
        "description": "Floating bootstrap supply for the upper gate drive; the bootstrap capacitor connects between BOOT and PHASE, and VBOOT-GND is rated to 36V maximum."
      },
      {
        "number": "3",
        "name": "PWM",
        "type": "input",
        "description": "Control input from the multi-phase PWM controller with three states, rising threshold 3.00V typ and falling threshold 2.00V typ at VCC = 12V, and VPWM limited to GND - 0.3V to 7V."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Bias and reference ground and the power ground return of the driver; all signals are referenced to this node."
      },
      {
        "number": "5",
        "name": "LGATE",
        "type": "output",
        "description": "Lower gate drive output that connects to the gate of the low-side power N-Channel MOSFET, limited to GND - 0.3V to VPVCC + 0.3V."
      },
      {
        "number": "6",
        "name": "VCC",
        "type": "power_in",
        "description": "Connect to a +12V bias supply (12V ±10%) with a high quality low-ESR ceramic capacitor to GND; VCC is monitored by POR with rising threshold 9.80V typ and falling threshold 7.60V typ."
      },
      {
        "number": "7",
        "name": "PVCC",
        "type": "power_in",
        "description": "Supplies the lower gate drive, and both gate drives in the ISL6613A; operating range is 5V to 12V ±10%."
      },
      {
        "number": "8",
        "name": "PHASE",
        "type": "passive",
        "description": "Connect to the source of the upper MOSFET and the drain of the lower MOSFET, providing the return path for the upper gate drive; absolute maximum is GND - 8V (<400ns) to 31V (<200ns) with VBOOT-GND below 36V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and names are taken from the Functional Pin Description table SOIC column (page 6), whic; The datasheet has no separate 8-lead SOIC thermal pad. The PAD pin (SOIC table has no entry, DFN pin; Pin types for BOOT (power_out) and PHASE (passive) are not stated in the datasheet and were assigned"
        ],
        "pages_sent": 14,
        "cost_usd": 0.1012,
        "at": "2026-10-31T00:23:26"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/d4c39046a127629a5c71bd062f55cb32.pdf",
        "pages": 14,
        "sha256": "47e5ad50fba3b86b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "isl6612acbz-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "isl6612acbz-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7e56d5df84bc97a57c5f7cddc9d21390ea8f04a535b957359a1e13539a910198",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "M8.15",
      "source_page": 13,
      "D": {
        "nom_mm": 4.9,
        "range_mm": [
          4.8,
          5.0
        ]
      },
      "E1": {
        "nom_mm": 3.9,
        "range_mm": [
          3.8,
          4.0
        ]
      },
      "E": {
        "nom_mm": 6.0,
        "range_mm": [
          5.8,
          6.2
        ]
      },
      "e": {
        "nom_mm": 1.27,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.55,
        "range_mm": [
          1.35,
          1.75
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "isl6612acbz-t.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}