component
ISL6612ACBZ-T
Public Made by Adomby adom
RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownISL6612ACBZ-T
RENESAS · Pre-ordered Chips · SOIC-8
ISL6612ACBZ-T from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UGATE | output | Upper gate drive output that connects to the gate of the high-side power N-Channel MOSFET, driven to 12V (VCC) in the ISL6612A. |
| 2 | BOOT | power_out | Floating bootstrap supply for the upper gate drive; the bootstrap capacitor connects between BOOT and PHASE, and VBOOT-GND is rated to 36V maximum. |
| 3 | PWM | input | Control input from the multi-phase PWM controller with three states, rising threshold 3.00V typ and falling threshold 2.00V typ at VCC = 12V, and VPWM limited to GND - 0.3V to 7V. |
| 4 | GND | power_in | Bias and reference ground and the power ground return of the driver; all signals are referenced to this node. |
| 5 | LGATE | output | Lower gate drive output that connects to the gate of the low-side power N-Channel MOSFET, limited to GND - 0.3V to VPVCC + 0.3V. |
| 6 | VCC | power_in | Connect to a +12V bias supply (12V ±10%) with a high quality low-ESR ceramic capacitor to GND; VCC is monitored by POR with rising threshold 9.80V typ and falling threshold 7.60V typ. |
| 7 | PVCC | power_in | Supplies the lower gate drive, and both gate drives in the ISL6613A; operating range is 5V to 12V ±10%. |
| 8 | PHASE | passive | Connect to the source of the upper MOSFET and the drain of the lower MOSFET, providing the return path for the upper gate drive; absolute maximum is GND - 8V (<400ns) to 31V (<200ns) with VBOOT-GND below 36V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Rising Threshold | 9.35 | 9.8 | 10 | V | TA = 0°C to +85°C | 5 | |
| VCC Falling Threshold | 7.35 | 7.6 | 8 | V | TA = 0°C to +85°C | 5 | |
| Typical Three-State Shutdown Window | 1.8 | 2.4 | V | VCC = 12V | 5 | ||
| Upper Drive Source Impedance | RU_SOURCE | 1.25 | 2 | 3 | Ω | 150mA Source Current | 6 |
| Upper Drive Transition Sink Impedance | RU_SINK_TR | 1.3 | 2.2 | Ω | 70ns With Respect To PWM Falling | 6 | |
| Upper Drive DC Sink Impedance | RU_SINK_DC | 0.9 | 1.65 | 3 | Ω | 150mA Source Current | 6 |
| Lower Drive Source Impedance | RL_SOURCE | 0.85 | 1.25 | 2.2 | Ω | 150mA Source Current | 6 |
| Lower Drive Sink Impedance | RL_SINK | 0.6 | 0.8 | 1.35 | Ω | 150mA Sink Current | 6 |
| Supply Voltage (VCC) absolute maximum | VCC | 15 | V | 5 | |||
| BOOT Voltage | VBOOT-GND | 36 | V | 5 | |||
| Input Voltage (PWM) | VPWM | -0.3 | 7 | V | GND - 0.3V to 7V, min referenced to GND | 5 | |
| PHASE DC voltage | VPHASE | -0.3 | 24 | V | DC, min referenced to GND | 5 | |
| PHASE transient voltage | VPHASE | -8 | V | <400ns, 20µJ, referenced to GND | 5 | ||
| PHASE transient voltage | VPHASE | 31 | V | <200ns, VBOOT-GND<36V | 5 | ||
| Maximum Junction Temperature (Plastic Package) | 150 | °C | 5 | ||||
| Maximum Storage Temperature Range | -65 | 150 | °C | 5 | |||
| Maximum Lead Temperature (Soldering) | 300 | °C | 10s, SOIC lead tips only | 5 | |||
| Ambient Temperature Range | 0 | 85 | °C | 2 | |||
| Maximum Operating Junction Temperature | 125 | °C | 5 | ||||
| Supply Voltage, VCC | VCC | 12 | V | 12V with 10% tolerance as printed | 5 | ||
| Supply Voltage Range, PVCC | PVCC | 5 | 12 | V | 5V to 12V with 10% tolerance as printed | 5 | |
| Thermal Resistance junction-to-ambient (SOIC) | JA | 100 | °C/W | SOIC package, component on high-effective thermal conductivity test board in free air (Note 4) | 5 | ||
| Package power dissipation capability (SO8) | 800 | mW | approximately, at room temperature, SO8 package | 8 |
CAD (KiCad official)
- Symbol:
ISL6612ACBZ-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
isl6612acbz-t-etched.step/isl6612acbz-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);isl6612acbz-t.step/isl6612acbz-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (14 pp, sha256
47e5ad50fba3b86b, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).