component
ISL43485IBZ
Public Made by Adomby adom
RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| isl43485ibz-etched.glb | 12d ago |
| isl43485ibz-etched.step | 12d ago |
| isl43485ibz-hero.glb | 12d ago |
| isl43485ibz-hero.overlay.json | 12d ago |
| isl43485ibz.glb | 12d ago |
| isl43485ibz.kicad_mod | 12d ago |
| isl43485ibz.kicad_sym | 12d ago |
| isl43485ibz.lbr | 12d ago |
| isl43485ibz.step | 12d ago |
| package.json | 12d ago |
| page.json | 12d ago |
| README.md | 12d ago |
ISL43485IBZ
RENESAS · Pre-ordered Chips · SOIC-8
ISL43485IBZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output: RO is high if A > B by at least 0.2V, low if A < B by 0.2V or more, and high if A and B are unconnected (floating). |
| 2 | RE | input | Receiver output enable: RO is enabled when RE is low and is high impedance when RE is high. |
| 3 | DE | input | Driver output enable: the driver outputs Y and Z are enabled by bringing DE high and are high impedance when DE is low. |
| 4 | DI | input | Driver input: a low on DI forces output Y low and output Z high, and a high on DI forces output Y high and output Z low. |
| 5 | GND | power_in | Ground connection. |
| 6 | A/Y | bidirectional | Noninverting receiver input and noninverting driver output; it is an input when DE = 0 and an output when DE = 1. |
| 7 | B/Z | bidirectional | Inverting receiver input and inverting driver output; it is an input when DE = 0 and an output when DE = 1. |
| 8 | VCC | power_in | System power supply input, specified for 3V to 3.6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC to Ground | 7 | V | 3 | ||||
| Input voltages DI, DE, RE | -0.5 | 7 | V | 3 | |||
| Input/output voltages A/Y, B/Z | -8 | 12.5 | V | 3 | |||
| Operating temperature range | -40 | 85 | °C | 3 | |||
| Maximum junction temperature (plastic package) | 150 | °C | 3 | ||||
| Maximum storage temperature range | -65 | 150 | °C | 3 | |||
| Maximum lead temperature (soldering 10s, lead tips only) | 300 | °C | Soldering 10s (lead tips only) | 3 | |||
| Driver differential VOUT (with load), RL = 100Ω (RS-422) | VOD2 | 2 | 2.7 | V | RL = 100Ω (RS-422) (Figure 1A) | 3 | |
| Driver differential VOUT (with load), RL = 54Ω (RS-485) | VOD2 | 1.5 | 2.3 | V | RL = 54Ω (RS-485) (Figure 1A) | 3 | |
| Driver differential VOUT (with load), RL = 60Ω, common-mode load | VOD2 | 1.5 | 2.6 | V | RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B) | 3 | |
| Change in magnitude of driver differential VOUT for complementary output states | VOD | 0.01 | 0.2 | V | RL = 54Ω or 100Ω (Figure 1A) | 3 | |
| Driver common-mode VOUT | VOC | 1.8 | 3 | V | RL = 54Ω or 100Ω (Figure 1A) | 3 | |
| Change in magnitude of driver common-mode VOUT for complementary output states | VOC | 0.01 | 0.2 | V | RL = 54Ω or 100Ω (Figure 1A) | 3 | |
| Logic input high voltage | VIH | 2 | V | DE, DI, RE | 3 | ||
| Logic input low voltage | VIL | 0.8 | V | DE, DI, RE | 3 | ||
| Logic input current (DE, DI) | IIN1 | -2 | 2 | µA | DE, DI | 3 | |
| Logic input current (RE) | IIN1 | -25 | 25 | µA | RE | 3 | |
| Input current (A/Y, B/Z) | IIN2 | 0.6 | 1 | mA | DE = 0V, VCC = 0V or 3.6V, VIN = 12V | 3 | |
| Input current (A/Y, B/Z) | IIN2 | -0.3 | -0.8 | mA | VIN = -7V | 3 | |
| Receiver differential threshold voltage | VTH | -0.2 | 0.2 | V | -7V ≤ VCM ≤ 12V | 3 | |
| Receiver output low voltage | VOL | 0.4 | V | IO = -4mA, VID = 200mV | 3 | ||
| Three-state (high impedance) receiver output current | IOZR | -1 | 1 | µA | 0.4V ≤ VO ≤ 2.4V | 4 | |
| Receiver input resistance | RIN | 12 | 19 | kΩ | -7V ≤ VCM ≤ 12V | 4 | |
| No-load supply current | ICC | 0.75 | 1.2 | mA | DI = 0V or VCC; DE = VCC, RE = 0V or VCC | 4 | |
| No-load supply current | ICC | 0.65 | 1 | mA | DE = 0V, RE = 0V | 4 | |
| Shutdown supply current | ISHDN | 15 | 100 | nA | DE = 0V, RE = VCC, DI = 0V or VCC | 4 | |
| Driver short-circuit current, VO = high or low | IOSD1 | 250 | mA | DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 7) | 4 | ||
| Receiver short-circuit current | IOSR | 8 | 60 | mA | 0V ≤ VO ≤ VCC | 4 | |
| Maximum data rate (driver) | fMAX | 30 | 50 | Mbps | (Figure 2A) | 4 | |
| Driver differential output delay | tDD | 3 | 10 | 25 | ns | RDIFF = 60Ω, CL = 15pF (Figure 2A) | 4 |
| Driver differential rise or fall time | tR, tF | 3 | 6 | 12 | ns | RDIFF = 60Ω, CL = 15pF (Figure 2A) | 4 |
| Driver input to output delay | tPLH, tPHL | 6 | 10 | 22 | ns | RL = 27Ω, CL = 15pF (Figure 2C) | 4 |
| Driver output skew | tSKEW | 1 | 5 | ns | RL = 27Ω, CL = 15pF (Figure 2C) | 4 | |
| Driver enable to output high | tZH | 45 | 90 | ns | RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Note 8) | 4 | |
| Driver enable to output low | tZL | 45 | 90 | ns | RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Note 8) | 4 | |
| Driver disable from output high | tHZ | 60 | 90 | ns | RL = 110Ω, CL = 50pF, SW = GND (Figure 3) | 4 | |
| Driver disable from output low | tLZ | 70 | 100 | ns | RL = 110Ω, CL = 50pF, SW = VCC (Figure 3) | 4 | |
| Driver enable from shutdown to output high | tZH(SHDN) | 115 | 150 | ns | RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Notes 10, 11) | 4 | |
| Driver enable from shutdown to output low | tZL(SHDN) | 115 | 150 | ns | RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Notes 10, 11) | 4 | |
| Maximum data rate (receiver) | fMAX | 27 | 35 | Mbps | VID ≥ 1.5V with tr/tf = 10ns, RO tH & tL ≥ 60% tUI (Figure 4) | 4 | |
| Receiver input to output delay | tPLH, tPHL | 25 | 45 | 80 | ns | (Figure 4) | 4 |
| Receiver skew /tPLH - tPHL/ | tSKD | 2 | 12 | ns | (Figure 4) | 4 | |
| Receiver enable to output high | tZH | 11 | 25 | ns | RL = 1kΩ, CL = 15pF, SW = GND (Figure 5), (Note 9) | 4 | |
| Receiver enable to output low | tZL | 11 | 25 | ns | RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5), (Note 9) | 4 | |
| Receiver disable from output high | tHZ | 7 | 20 | ns | RL = 1kΩ, CL = 15pF, SW = GND (Figure 5) | 4 | |
| Receiver disable from output low | tLZ | 7 | 20 | ns | RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5) | 5 | |
| Time to shutdown | tSHDN | 80 | 190 | 300 | ns | (Note 10) | 5 |
| Receiver enable from shutdown to output high | tZH(SHDN) | 240 | 400 | ns | RL = 1kΩ, CL = 15pF, SW = GND (Figure 5), (Notes 10, 12) | 5 | |
| Receiver enable from shutdown to output low | tZL(SHDN) | 240 | 400 | ns | RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5), (Notes 10, 12) | 5 | |
| Thermal resistance, junction to ambient (8 Ld SOIC) | JA | 170 | °C/W | 8 Ld SOIC package, typical (Note 4) | 3 |
CAD (KiCad official)
- Symbol:
ISL43485IBZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
isl43485ibz-etched.step/isl43485ibz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);isl43485ibz.step/isl43485ibz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (13 pp, sha256
865b85e99da3f01d, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).