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IS25WP016D-JNLE

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ISSI Integrated Silicon Solution NOR FLASH, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IS25WP016D-JNLE

ISSI Integrated Silicon Solution · NOR FLASH · SOIC-8

IS25WP016D-JNLE from ISSI Integrated Silicon Solution, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: driving CE# high deselects the device and puts the outputs in high impedance, while CE# must transition from high to low after power-up before a new instruction is accepted.
2 SO (IO1) bidirectional Serial Data Output: in standard SPI it reads data or status on the falling edge of SCK, and it becomes the bidirectional IO1 in Dual and Quad SPI modes.
3 WP# (IO2) bidirectional Write Protect: with SRWD set to 1, pulling WP# low write-protects the Status Register bits, and it becomes IO2 when QE is set to 1, which disables the WP# function.
4 GND power_in Ground: connect to ground when referenced to Vcc.
5 SI (IO0) bidirectional Serial Data Input: in standard SPI it writes instructions, addresses or data on the rising edge of SCK, and it becomes the bidirectional IO0 in Dual and Quad SPI modes.
6 SCK input Serial Data Clock: provides the synchronized clock for input and output timing operations.
7 HOLD# or RESET# (IO3) bidirectional HOLD# is active low and pauses serial communication while CE# is low, with SO at high impedance; the pin can be set to RESET# via the P7 bit of the Read Register (default HOLD#), and it becomes IO3 when QE is set to 1.
8 Vcc power_in Power: device core power supply; for the IS25WP016D the stated operating range is 1.65V to 1.95V.

Key specifications

Parameter Value
Manufacturer ISSI Integrated Silicon Solution
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature -65 150 °C 93
VCC supply voltage (IS25WP) VCC -0.5 2.5 V IS25WP 93
Input voltage with respect to ground on all pins -0.5 V 93
All output voltage with respect to ground -0.5 V 93
Electrostatic discharge voltage (Human Body Model) -2000 2000 V Human Body Model, ANSI/ESDA/JEDEC JS-001 93
Ambient operating temperature, extended grade E -40 105 °C Extended grade E 93
VCC power supply (IS25WP) VCC 1.65 1.8 1.95 V IS25WP 93
VCC active read current, NORD ICC1 4 12 mA NORD at 50MHz 94
VCC active read current, FRD single ICC1 6 14 mA FRD Single at 133MHz 94
VCC active read current, FRD dual ICC1 8 15 mA FRD Dual at 133MHz 94
VCC active read current, FRD quad ICC1 10 17 mA FRD Quad at 133MHz 94
VCC active read current, FRD quad ICC1 8 15 mA FRD Quad at 84MHz 94
VCC active read current, FRD quad ICC1 9 16 mA FRD Quad at 104MHz 94
VCC active read current, FRD single DTR ICC1 6 14 mA FRD Single DTR at 66MHz 94
VCC active read current, FRD dual DTR ICC1 8 15 mA FRD Dual DTR at 66MHz 94
VCC active read current, FRD quad DTR ICC1 10 17 mA FRD Quad DTR at 66MHz 94
VCC program current ICC2 22 25 mA CE# = VCC, 85°C 94
VCC program current ICC2 25 mA CE# = VCC, 105°C 94
VCC erase current (SER/BER32/BER64) ICC4 22 25 mA CE# = VCC, 85°C 94
VCC erase current (SER/BER32/BER64) ICC4 25 mA CE# = VCC, 105°C 94
VCC standby current, CMOS ISB1 8 15 µA CE# = VCC, VIN = GND or VCC, 85°C 94
VCC standby current, CMOS ISB1 20 µA CE# = VCC, VIN = GND or VCC, 105°C 94
VCC standby current, CMOS ISB1 30 µA CE# = VCC, VIN = GND or VCC, 125°C 94
Deep power down current (IS25WP) ISB2 1 5 µA IS25WP CE# = VCC, VIN = GND or VCC, 85°C 94
Deep power down current (IS25WP) ISB2 10 µA IS25WP CE# = VCC, VIN = GND or VCC, 105°C 94
Deep power down current (IS25WP) ISB2 15 µA IS25WP CE# = VCC, VIN = GND or VCC, 125°C 94
Input leakage current ILI -1 1 µA VIN = 0V to VCC 94
Output leakage current ILO -1 1 µA VIN = 0V to VCC 94
Input low voltage VIL -0.5 V 94
Output low voltage VOL 0.2 V IOL = 100 µA 94
Clock frequency except fast read Quad I/O, QPI, DTR and read (03h) fCT 0 133 MHz except fast read Quad I/O, QPI, DTR and read (03h) 96
Clock frequency for fast read Quad I/O and QPI (IS25WP) fCT 0 104 MHz Fast read Quad I/O and QPI, IS25WP 96
Clock frequency for fast read DTR fCT 0 66 MHz SPI DTR, Dual DTR, Dual I/O DTR, Quad I/O DTR, and QPI DTR 96
Clock frequency for read (03h) fC 0 50 MHz Read (03h) 96
CE# high time tCEH 7 ns 96
CE# setup time tCS 5 ns 96
CE# hold time tCH 5 ns 96
CE# not active hold time tCHSL 2.7 ns 96
CE# not active setup time tSHCH 2.7 ns 96
Data in setup time (STR) tDS 2 ns STR 96
Data in hold time (STR) tDH 2 ns STR 96
Output valid at 133MHz tV 7 ns @133MHz, CL = 15pF 96
Output valid at 104MHz tV 8 ns @104MHz, CL = 30pF 96
Output hold time tOH 2 ns 96
Output disable time tDIS 8 ns 96
Sector erase time (4Kbyte) tEC 70 300 ms 96
Block erase time (32Kbyte) 0.1 0.5 s 96
Block erase time (64Kbyte) 0.15 1 s 96
Chip erase time (16Mb) 4 12 96
Page program time tPP 0.2 0.8 ms 96
Vcc(min) to CE# low tVCE 300 us Vcc(min) to CE# low 101
Write inhibit voltage (IS25WP) VWI 1.4 V IS25WP 101
Release deep power down (IS25WP) tRES1 5 µs IS25WP 97
Deep power down entry time tDP 3 µs 97
Write status register time tW 2 15 ms 97
Suspend to read ready tSUS 100 µs 97
Resume to next suspend TRS 80 µs 97
Endurance 100000 cycles JEDEC Standard A117 102

CAD (KiCad official)

  • Symbol: IS25WP016D-JNLE
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: is25wp016d-jnle-etched.step / is25wp016d-jnle-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is25wp016d-jnle.step / is25wp016d-jnle.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ISSI Integrated Silicon Solution datasheet (115 pp, sha256 b7472bc6861b38f4, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF