component
IS25LP512M-JLLE
Public Made by Adomby adom
ISSI(Integrated Silicon Solution) Pre-ordered Chips, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "IS25LP512M-JLLE",
"brief": "ISSI(Integrated Silicon Solution) Pre-ordered Chips, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"manufacturer": "ISSI(Integrated Silicon Solution)",
"package": "WSON-8-EP(6x8)",
"pin_count": 9,
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"digikey": "IS25LP512M-JLLE-ND",
"mouser": "870-IS25LP512M-JLLE"
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{
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"name": "SO (IO1)",
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{
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"name": "WP# (IO2)",
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"description": "Write Protect pin that protects the Status Register bits (SRWD, QE, BP3-BP0) when SRWD=1 and WP# is low, and serves as IO2 in Quad mode, where the WP# function is unavailable when QE=1."
},
{
"number": "4",
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{
"number": "5",
"name": "SI (IO0)",
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"description": "Serial Data Input in standard SPI (sampled on the rising edge of SCK) and bidirectional IO0 in Dual and Quad modes."
},
{
"number": "6",
"name": "SCK",
"type": "input",
"description": "Serial Data Clock that synchronizes input and output timing operations."
},
{
"number": "7",
"name": "HOLD# or RESET# (IO3)",
"type": "bidirectional",
"description": "HOLD# (default, P7=0) or RESET# (P7=1) when QE=0, with no dedicated RESET# on the WSON, and IO3 in Quad mode when QE=1; HOLD# is active low and pauses serial communication while the device is selected."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Device core power supply, 2.30V to 3.60V for IS25LP512M."
},
{
"number": "9",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The page 7 pin figure for the 8-contact WSON was extracted as scrambled text, with pin numbers separ; The text does not mention an exposed thermal pad for the WSON, so none is listed. Check the package ; The part is IS25LP (2.30V to 3.60V). The VCC range is taken from the Features list. The pin table on"
],
"pages_sent": 11,
"cost_usd": 0.1821,
"at": "2026-10-30T12:01:42"
},
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"pages": 185,
"sha256": "6a953943df144920",
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"metadata": {
"specs": {
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"Package": "WSON-8-EP(6x8)",
"Category": "Interface ICs",
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{
"name": "Supply voltage absolute maximum (IS25LP)",
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"min": -0.5,
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{
"name": "Storage temperature",
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{
"name": "Lead soldering temperature (lead-free)",
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"typ": null,
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{
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"conditions": "With respect to ground on all pins; max printed as VCC + 0.5V",
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{
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"conditions": "FRD Single at 133MHz",
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"max": 27,
"conditions": "FRD Quad at 133MHz",
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{
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{
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"source": "datasheet"
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{
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"conditions": "VIN = 0V to VCC",
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{
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{
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"conditions": "IOL = 100 µA",
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{
"name": "Input capacitance (CE#, SCK)",
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"conditions": "VIN = 0V, TA = 25°C, VCC=3V, 1MHz, IS25LP",
"source_page": 172,
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{
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"symbol": "CIN/OUT",
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"conditions": "VIN/OUT = 0V, TA = 25°C, VCC=3V, 1MHz, IS25LP",
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{
"name": "Clock frequency (IS25LP)",
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{
"name": "CE# high time",
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{
"name": "CE# setup time",
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"min": 5,
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{
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{
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{
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{
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{
"name": "Endurance",
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"conditions": "JEDEC Standard A117",
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{
"name": "Data retention",
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"name": "Latch-up",
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