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IS25LP128F-JBLA3

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ISSI Integrated Silicon Solution NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IS25LP128F-JBLA3

ISSI Integrated Silicon Solution · NOR FLASH · SOIC-8-208mil

IS25LP128F-JBLA3 from ISSI Integrated Silicon Solution, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: when CE# is high the device is deselected, outputs are high-impedance and the device enters its low-power standby state, and CE# must go high-to-low before a new instruction is accepted after power-up.
2 SO (IO1) bidirectional Serial Data Output (IO1): in standard SPI it is a unidirectional output that changes on the falling edge of SCK, and in Dual/Quad SPI it becomes a bidirectional IO that is written on the rising edge and read on the falling edge of SCK.
3 WP# (IO2) bidirectional Write Protect/Serial Data IO (IO2): with SRWD set to 1 and WP# pulled low, the Status Register bits (SRWD, QE, BP3-BP0) are write-protected, and when QE is set to 1 this pin is used as IO2 and the WP# function is unavailable.
4 GND power_in Ground: connect to ground when referenced to Vcc.
5 SI (IO0) bidirectional Serial Data Input (IO0): in standard SPI it is a unidirectional input latched on the rising edge of SCK, and in Dual/Quad SPI it becomes a bidirectional IO that is written on the rising edge and read on the falling edge of SCK.
6 SCK input Serial Data Clock: synchronized clock for input and output timing operations.
7 HOLD# or RESET# (IO3) bidirectional HOLD# or RESET#/Serial Data IO (IO3): when QE=0 the pin acts as HOLD# (active low, pausing serial communication without resetting the sequence, default) or RESET# as selected by the P7 bit of the Read Register, and when QE=1 it becomes IO3.
8 Vcc power_in Power: device core power supply.

Key specifications

Parameter Value
Manufacturer ISSI Integrated Silicon Solution
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Power Supply (IS25LP, 3.0V device) VCC 2.3 3 3.6 V IS25LP 163
Operating Temperature (Automotive Grade A3) -40 125 °C Grade A3 163
Storage Temperature -65 150 °C 163
Surface Mount Lead Soldering Temperature 260 °C Lead-free package, 3 seconds 163
Input Voltage with Respect to Ground on All Pins -0.5 V Upper limit VCC + 0.5V 163
All Output Voltage with Respect to Ground -0.5 V Upper limit VCC + 0.5V 163
VCC Supply Voltage (IS25LP) VCC -0.5 6 V IS25LP 163
VCC Active Read current ICC1 8 9 mA NORD at 80MHz 164
VCC Active Read current ICC1 9 11 mA FRD Single at 166MHz 164
VCC Active Read current ICC1 11 12 mA FRD Dual at 166MHz 164
VCC Active Read current ICC1 14 15 mA FRD Quad at 166MHz 164
VCC Active Read current ICC1 9 10.5 mA FRD Single at 133MHz 164
VCC Active Read current ICC1 10 11 mA FRD Dual at 133MHz 164
VCC Active Read current ICC1 12.5 13.5 mA FRD Quad at 133MHz 164
VCC Active Read current ICC1 8.5 9.5 mA FRD Single DTR at 80MHz 164
VCC Program Current ICC2 25 30 mA CE# = VCC, 85°C 164
VCC Program Current ICC2 30 mA CE# = VCC, 105°C 164
VCC Standby Current CMOS (IS25LP) ISB1 8 30 µA CE# = VCC, VIN = GND or VCC, 85°C 164
VCC Standby Current CMOS (IS25LP) ISB1 45 µA CE# = VCC, VIN = GND or VCC, 105°C 164
VCC Standby Current CMOS (IS25LP) ISB1 70 µA CE# = VCC, VIN = GND or VCC, 125°C 164
Deep power down current (IS25LP) ISB2 5 15 µA CE# = VCC, VIN = GND or VCC, 85°C 164
Deep power down current (IS25LP) ISB2 20 µA CE# = VCC, VIN = GND or VCC, 105°C 164
Deep power down current (IS25LP) ISB2 35 µA CE# = VCC, VIN = GND or VCC, 125°C 164
Input Leakage Current ILI -1 1 µA VIN = 0V to VCC 164
Output Leakage Current ILO -1 1 µA VIN = 0V to VCC 164
Input Low Voltage VIL -0.5 V 164
Output Low Voltage VOL 0.2 V IOL = 100 µA 164
Input Capacitance (CE#, SCK) CIN 6 pF VIN = 0V; TA = 25°C, VCC = 3V, 1MHz 165
Input/Output Capacitance (other pins) CIN/OUT 8 pF VIN/OUT = 0V; TA = 25°C, VCC = 3V, 1MHz 165
Input Rise and Fall Times TR,TF 5 ns 165
Clock Frequency (except fast read DTR and read 03h) fCT 0 166 MHz IS25LP, VCC = 2.7V to 3.6V 166
Clock Frequency (except fast read DTR and read 03h) fCT 0 133 MHz IS25LP, VCC = 2.3V to 3.6V 166
Clock Frequency for fast read DTR 0 80 MHz SPI DTR, Dual DTR, Dual I/O DTR, Quad I/O DTR, QPI DTR 166
Clock Frequency for read (03h) fC 0 80 MHz 166
Output Valid tV 6.5 ns VCC 2.3~3.6V, -40°C to 125°C, @10pF 166
Output Valid tV 8 ns VCC 2.3~3.6V, -40°C to 125°C, @30pF 166
Output Hold Time tOH 2 ns 166
Output Disable Time tDIS 8 ns 166
CE# High Time (read mode) tCEH 7 ns For read mode 166
CE# High Time (write mode) tCEH 20 ns For write mode 166
CE# Setup Time tCS 3 ns 166
CE# Hold Time tCH 3 ns 166
Data In Setup Time (STR) tDS 2 ns STR 166
Data In Hold Time (STR) tDH 2 ns STR 166
Write Protect Setup Time tWHSL 20 ns 166
Write Protect Hold Time tSHWL 100 ns 166
RESET# pin low pulse width tRESET 100 ns 167
Hardware Reset recovery time tHWRST 35 µs 167
Software Reset recovery time tSRST 35 µs 167
Sector Erase Time (4Kbyte) tEC 100 300 ms 167
Block Erase Time (32Kbyte) 0.14 0.5 s 167
Block Erase Time (64Kbyte) 0.17 1 s 167
Chip Erase Time 35 90 s 167
Page Program Time tPP 0.2 0.8 ms 167
Write Status Register time tW 2 15 ms 167

CAD (KiCad official)

  • Symbol: IS25LP128F-JBLA3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: is25lp128f-jbla3-etched.step / is25lp128f-jbla3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is25lp128f-jbla3.step / is25lp128f-jbla3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ISSI Integrated Silicon Solution datasheet (180 pp, sha256 8eee02b03531933f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF