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Ray Publish 0.1.0 0a77948 1d ago
{
  "slug": "is25lp020e-jnla3-tr",
  "version": "0.1.0",
  "type": "component",
  "description": "ISSI Integrated Silicon Solution NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "memory",
    "is25lp020e-jnla3-tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "is25lp020e-jnla3-tr.kicad_sym",
    "is25lp020e-jnla3-tr.kicad_mod",
    "is25lp020e-jnla3-tr.glb",
    "is25lp020e-jnla3-tr.step",
    "is25lp020e-jnla3-tr.lbr",
    "docs/hero.png",
    "docs/is25lp020e-jnla3-tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "is25lp020e-jnla3-tr-hero.glb",
    "is25lp020e-jnla3-tr-hero.overlay.json",
    "is25lp020e-jnla3-tr-etched.glb"
  ],
  "component": {
    "mpn": "IS25LP020E-JNLA3-TR",
    "manufacturer": "ISSI Integrated Silicon Solution",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "NOR FLASH",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603490898651471872",
    "parts": {
      "symbol": "is25lp020e-jnla3-tr.kicad_sym",
      "footprint": "is25lp020e-jnla3-tr.kicad_mod",
      "model_3d": "is25lp020e-jnla3-tr-hero.glb",
      "model_3d_plain": "is25lp020e-jnla3-tr-etched.glb",
      "model_3d_step": "is25lp020e-jnla3-tr-etched.step",
      "model_3d_step_plain": "is25lp020e-jnla3-tr.step",
      "lbr": "is25lp020e-jnla3-tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C20189613",
      "digikey": "706-IS25LP020E-JNLA3-TR-ND",
      "mouser": "870-IS25LP20EJNLA3TR"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T02:13:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "706-IS25LP020E-JNLA3-TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "870-IS25LP20EJNLA3TR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CE#",
        "type": "input",
        "description": "Chip Enable: when high the device is deselected and outputs are high impedance, and after power-up CE# must transition from high to low before a new instruction is accepted."
      },
      {
        "number": "2",
        "name": "SO (IO1)",
        "type": "bidirectional",
        "description": "Serial Data Output for standard SPI, read on the falling edge of SCK; in Dual and Quad SPI mode it becomes the bidirectional IO1 pin."
      },
      {
        "number": "3",
        "name": "WP# (IO2)",
        "type": "bidirectional",
        "description": "Write Protect (active low) protects the Status Register together with the SRWD bit, and when QE is set to 1 it is used as IO2 so the write-protect function is not available."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground: connect to ground when referenced to Vcc."
      },
      {
        "number": "5",
        "name": "SI (IO0)",
        "type": "bidirectional",
        "description": "Serial Data Input for instructions, addresses, or data, sampled on the rising edge of SCK; in Dual and Quad SPI mode it becomes the bidirectional IO0 pin."
      },
      {
        "number": "6",
        "name": "SCK",
        "type": "input",
        "description": "Serial Data Clock: synchronizes the input and output timing operations."
      },
      {
        "number": "7",
        "name": "HOLD# (IO3)",
        "type": "bidirectional",
        "description": "Hold (active low) pauses serial communication without resetting the serial sequence while CE# is low; when QE is set to 1 it becomes IO3 and the HOLD# function is not available."
      },
      {
        "number": "8",
        "name": "Vcc",
        "type": "power_in",
        "description": "Device core power supply; the IS25LP part is specified for 2.30V to 3.60V single voltage supply."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-configuration diagram on page 6 is a shared figure for all 8-pin packages (B, N, D, V, Y, K); MPN IS25LP020E-JNLA3-TR decodes per the ordering section (page 92) as: 020 = 2 Mbit, E = die revisio"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0515,
        "at": "2026-10-21T02:09:41"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603490898651471872",
        "pages": 93,
        "sha256": "682d1cb75600d9cd",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "is25lp020e-jnla3-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "is25lp020e-jnla3-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e5170b026a7de1a939d560b17bbb5f6e022153b2ca57b4910b327a028e2bfe94",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}