IRS2181STRPBF

{
  "slug": "irs2181strpbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management ics",
    "irs2181strpbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "irs2181strpbf.kicad_sym",
    "irs2181strpbf.kicad_mod",
    "irs2181strpbf.glb",
    "irs2181strpbf.step",
    "irs2181strpbf.lbr",
    "docs/hero.png",
    "docs/irs2181strpbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "irs2181strpbf-hero.glb",
    "irs2181strpbf-hero.overlay.json",
    "irs2181strpbf-etched.glb"
  ],
  "component": {
    "mpn": "IRS2181STRPBF",
    "manufacturer": "Infineon Technologies",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management ICs",
    "subcategory": "Gate Drive ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e87d2ac111144979b51639aca53d1269.pdf",
    "parts": {
      "symbol": "irs2181strpbf.kicad_sym",
      "footprint": "irs2181strpbf.kicad_mod",
      "model_3d": "irs2181strpbf-hero.glb",
      "model_3d_plain": "irs2181strpbf-etched.glb",
      "model_3d_step": "irs2181strpbf-etched.step",
      "model_3d_step_plain": "irs2181strpbf.step",
      "lbr": "irs2181strpbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C67284",
      "digikey": "IRS2181STRPBFTR-ND",
      "mouser": "942-IRS2181STRPBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T22:30:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "IRS2181STRPBFTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "942-IRS2181STRPBF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "HIN",
        "type": "input",
        "description": "Logic input for the high-side gate driver output (HO), in phase, with VIH minimum 2.5 V and VIL maximum 0.8 V referenced to COM, compatible with 3.3 V logic."
      },
      {
        "number": "2",
        "name": "LIN",
        "type": "input",
        "description": "Logic input for the low-side gate driver output (LO), in phase, with VIH minimum 2.5 V and VIL maximum 0.8 V referenced to COM, compatible with 3.3 V logic."
      },
      {
        "number": "3",
        "name": "COM",
        "type": "power_in",
        "description": "Low-side return; all voltage parameters are absolute voltages referenced to COM."
      },
      {
        "number": "4",
        "name": "LO",
        "type": "output",
        "description": "Low-side gate drive output, with pulsed sink current of at least 1.8 A (PW ≤ 10 µs) and VLO limited to VCC + 0.3 V maximum."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Low-side and logic fixed supply, recommended 10 V to 20 V, with absolute maximum of 20 V and undervoltage lockout near 8.9 V typical on the positive-going threshold."
      },
      {
        "number": "6",
        "name": "VS",
        "type": "power_in",
        "description": "High-side floating supply return (offset), rated for -5 V to +600 V logic operation and with dVS/dt allowable transient of 50 V/ns."
      },
      {
        "number": "7",
        "name": "HO",
        "type": "output",
        "description": "High-side gate drive output, referenced to VS, with pulsed source current of at least 1.4 A (PW ≤ 10 µs) and VHO limited to VB + 0.3 V maximum."
      },
      {
        "number": "8",
        "name": "VB",
        "type": "power_in",
        "description": "High-side floating supply, with absolute maximum of 620 V referenced to COM and recommended operation at VS + 10 V to VS + 20 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 8-lead SOIC lead assignment is shown as a graphic. Pin numbers and names were read from the extr; The datasheet does not state a pin type for each lead, so types were assigned by KiCad ERC conventio"
        ],
        "pages_sent": 23,
        "cost_usd": 0.0658,
        "at": "2026-10-28T22:30:09"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/e87d2ac111144979b51639aca53d1269.pdf",
        "pages": 23,
        "sha256": "6ba975aee4a39717",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "irs2181strpbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "irs2181strpbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2b013bc2a6de131e96c67b73c39a9d42d03f0d1dab53eb725c5167432171100c",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "8-Lead SOIC (01-6027 / 01-0021, MS-012AA)",
      "source_page": 19,
      "D": {
        "nom_mm": 4.9,
        "range_mm": [
          4.8,
          5.0
        ]
      },
      "E1": {
        "nom_mm": 3.9,
        "range_mm": [
          3.8,
          4.0
        ]
      },
      "E": {
        "nom_mm": 6.0,
        "range_mm": [
          5.8,
          6.2
        ]
      },
      "e": {
        "nom_mm": 1.27,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.55,
        "range_mm": [
          1.35,
          1.75
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "irs2181strpbf.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}