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IRS2181STRPBF
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownIRS2181STRPBF
Infineon Technologies · Gate Drive ICs · SOIC-8
IRS2181STRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN | input | Logic input for the high-side gate driver output (HO), in phase, with VIH minimum 2.5 V and VIL maximum 0.8 V referenced to COM, compatible with 3.3 V logic. |
| 2 | LIN | input | Logic input for the low-side gate driver output (LO), in phase, with VIH minimum 2.5 V and VIL maximum 0.8 V referenced to COM, compatible with 3.3 V logic. |
| 3 | COM | power_in | Low-side return; all voltage parameters are absolute voltages referenced to COM. |
| 4 | LO | output | Low-side gate drive output, with pulsed sink current of at least 1.8 A (PW ≤ 10 µs) and VLO limited to VCC + 0.3 V maximum. |
| 5 | VCC | power_in | Low-side and logic fixed supply, recommended 10 V to 20 V, with absolute maximum of 20 V and undervoltage lockout near 8.9 V typical on the positive-going threshold. |
| 6 | VS | power_in | High-side floating supply return (offset), rated for -5 V to +600 V logic operation and with dVS/dt allowable transient of 50 V/ns. |
| 7 | HO | output | High-side gate drive output, referenced to VS, with pulsed source current of at least 1.4 A (PW ≤ 10 µs) and VHO limited to VB + 0.3 V maximum. |
| 8 | VB | power_in | High-side floating supply, with absolute maximum of 620 V referenced to COM and recommended operation at VS + 10 V to VS + 20 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic "1" input voltage | VIH | 2.5 | V | 3 | |||
| Logic "0" input voltage | VIL | 0.8 | V | 3 | |||
| High level output voltage, VBIAS - VO | VOH | 1.4 | V | IO = 0 A | 3 | ||
| Low level output voltage, VO | VOL | 0.2 | V | IO = 20 mA | 3 | ||
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 600 V | 3 | ||
| Quiescent VBS supply current | IQBS | 20 | 60 | 150 | µA | 3 | |
| Quiescent VCC supply current | IQCC | 50 | 120 | 240 | µA | 3 | |
| Logic "1" input bias current | IIN+ | 25 | 60 | µA | VIN = 5 V | 3 | |
| Logic "0" input bias current | IIN- | 5 | µA | VIN = 0 V | 3 | ||
| VCC and VBS supply undervoltage positive going threshold | VCCUV+, VBSUV+ | 8 | 8.9 | 9.8 | V | 3 | |
| VCC and VBS supply undervoltage negative going threshold | VCCUV-, VBSUV- | 7.4 | 8.2 | 9 | V | 3 | |
| VCC and VBS undervoltage hysteresis | VCCUVH, VBSUVH | 0.3 | 0.7 | V | 3 | ||
| Output high short circuit pulsed current | IO+ | 1.4 | 1.9 | A | VO = 0 V, PW ≤ 10 µs | 3 | |
| Output low short circuit pulsed current | IO- | 1.8 | 2.3 | A | VO = 15 V, PW ≤ 10 µs | 3 | |
| Turn-on propagation delay | ton | 180 | 270 | ns | VS = 0 V | 3 | |
| Turn-off propagation delay | toff | 220 | 330 | ns | VS = 0 V or 600 V | 3 | |
| Delay matching, HS & LS turn-on/off | MT | 0 | 35 | ns | 3 | ||
| Turn-on rise time | tr | 40 | 60 | ns | 3 | ||
| Turn-off fall time | tf | 20 | 35 | ns | 3 | ||
| High-side floating absolute voltage | VB | -0.3 | 620 | V | 2 | ||
| Low-side and logic fixed supply voltage | VCC | -0.3 | 20 | V | 2 | ||
| Low-side output voltage | VLO | -0.3 | V | 2 | |||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 2 | |||
| Package power dissipation (8-lead SOIC) | PD | 0.625 | W | TA ≤ +25 °C | 2 | ||
| Thermal resistance, junction to ambient (8-lead SOIC) | RthJA | 200 | °C/W | 8-lead SOIC | 2 | ||
| Junction temperature | TJ | 150 | °C | 2 | |||
| Storage temperature | TS | -50 | 150 | °C | 2 | ||
| Lead temperature (soldering, 10 seconds) | TL | 300 | °C | soldering, 10 seconds | 2 | ||
| High-side floating supply offset voltage | VS | 600 | V | see Note 2 | 2 | ||
| Low-side and logic fixed supply voltage | VCC | 10 | 20 | V | 2 | ||
| Low-side output voltage | VLO | 0 | V | 2 | |||
| Logic ground (IRS21814 only) | VSS | -5 | 5 | V | 2 | ||
| Ambient temperature | TA | -40 | 125 | °C | 2 |
CAD (KiCad official)
- Symbol:
IRS2181STRPBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
irs2181strpbf-etched.step/irs2181strpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irs2181strpbf.step/irs2181strpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (23 pp, sha256
6ba975aee4a39717, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).