IRS2001STRPBF-JSM

{
  "slug": "irs2001strpbf-jsm",
  "version": "0.1.0",
  "type": "component",
  "description": "JSMSEMI Gate Drive ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management",
    "irs2001strpbf-jsm",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "irs2001strpbf-jsm.kicad_sym",
    "irs2001strpbf-jsm.kicad_mod",
    "irs2001strpbf-jsm.glb",
    "irs2001strpbf-jsm.step",
    "irs2001strpbf-jsm.lbr",
    "docs/hero.png",
    "docs/irs2001strpbf-jsm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "irs2001strpbf-jsm-hero.glb",
    "irs2001strpbf-jsm-hero.overlay.json",
    "irs2001strpbf-jsm-etched.glb"
  ],
  "component": {
    "mpn": "IRS2001STRPBF-JSM",
    "manufacturer": "JSMSEMI",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management",
    "subcategory": "Gate Drive ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e943035e07d328f1f8540c1d34711d80.pdf",
    "parts": {
      "symbol": "irs2001strpbf-jsm.kicad_sym",
      "footprint": "irs2001strpbf-jsm.kicad_mod",
      "model_3d": "irs2001strpbf-jsm-hero.glb",
      "model_3d_plain": "irs2001strpbf-jsm-etched.glb",
      "model_3d_step": "irs2001strpbf-jsm-etched.step",
      "model_3d_step_plain": "irs2001strpbf-jsm.step",
      "lbr": "irs2001strpbf-jsm.lbr"
    },
    "distributor_links": {
      "lcsc": "C19673774"
    },
    "distributor_check": {
      "checked_at": "2026-10-27T00:39:51Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC",
        "type": "power_in",
        "description": "Low-side supply voltage; recommended 10 V to 20 V and absolute maximum 25 V."
      },
      {
        "number": "2",
        "name": "HIN",
        "type": "input",
        "description": "High-side logic signal input; logic high threshold min 2.5 V and logic low threshold max 0.8 V, with input voltage range 0 V to VCC."
      },
      {
        "number": "3",
        "name": "LIN",
        "type": "input",
        "description": "Low-side logic signal input; logic high threshold min 2.5 V and logic low threshold max 0.8 V, with input voltage range 0 V to VCC."
      },
      {
        "number": "4",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground; the reference for all voltage parameters and logic inputs."
      },
      {
        "number": "5",
        "name": "LO",
        "type": "output",
        "description": "Low-side gate drive output with 290 mA typical source and 600 mA typical sink current."
      },
      {
        "number": "6",
        "name": "VS",
        "type": "power_in",
        "description": "High-side floating return; recommended maximum 250 V, with the datasheet stating VS must stay within -8 V to 200 V for correct operation."
      },
      {
        "number": "7",
        "name": "HO",
        "type": "output",
        "description": "High-side gate drive output swinging between VS and VB, with 290 mA typical source and 600 mA typical sink current."
      },
      {
        "number": "8",
        "name": "VB",
        "type": "power_in",
        "description": "High-side floating supply; recommended VS+10 V to VS+20 V and absolute maximum 275 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet has no text layer, so the pinout was read from page images. The pin table on page 2 gi; The package is named SOP-8 on pages 1 and 2, while the outline drawing on page 8 is titled SOIC-8. B; The block diagram on page 7 shows LIN with a pull-down resistor, and the electrical characteristics ",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0442,
        "at": "2026-10-27T00:38:40"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/e943035e07d328f1f8540c1d34711d80.pdf",
        "pages": 8,
        "sha256": "2a3b11a0ee2281a9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "irs2001strpbf-jsm-etched.step",
        "role": "eda",
        "up": "Z",
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        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "sha256": "8ab3f18615c363cf87678acb101ef07dd9f1d851485350865eeb393c7f75fc1c",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}