component
IRS2001STRPBF-JSM
Public Made by Adomby adom
JSMSEMI Gate Drive ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9h ago |
| viewers | 9h ago |
| irs2001strpbf-jsm-etched.glb | 9h ago |
| irs2001strpbf-jsm-etched.step | 9h ago |
| irs2001strpbf-jsm-hero.glb | 9h ago |
| irs2001strpbf-jsm-hero.overlay.json | 9h ago |
| irs2001strpbf-jsm.glb | 9h ago |
| irs2001strpbf-jsm.kicad_mod | 9h ago |
| irs2001strpbf-jsm.kicad_sym | 9h ago |
| irs2001strpbf-jsm.lbr | 9h ago |
| irs2001strpbf-jsm.step | 9h ago |
| package.json | 9h ago |
| page.json | 9h ago |
| README.md | 9h ago |
IRS2001STRPBF-JSM
JSMSEMI · Gate Drive ICs · SOP-8
IRS2001STRPBF-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply voltage; recommended 10 V to 20 V and absolute maximum 25 V. |
| 2 | HIN | input | High-side logic signal input; logic high threshold min 2.5 V and logic low threshold max 0.8 V, with input voltage range 0 V to VCC. |
| 3 | LIN | input | Low-side logic signal input; logic high threshold min 2.5 V and logic low threshold max 0.8 V, with input voltage range 0 V to VCC. |
| 4 | VSS | power_in | Ground; the reference for all voltage parameters and logic inputs. |
| 5 | LO | output | Low-side gate drive output with 290 mA typical source and 600 mA typical sink current. |
| 6 | VS | power_in | High-side floating return; recommended maximum 250 V, with the datasheet stating VS must stay within -8 V to 200 V for correct operation. |
| 7 | HO | output | High-side gate drive output swinging between VS and VB, with 290 mA typical source and 600 mA typical sink current. |
| 8 | VB | power_in | High-side floating supply; recommended VS+10 V to VS+20 V and absolute maximum 275 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | Power Management |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
IRS2001STRPBF-JSM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
irs2001strpbf-jsm-etched.step/irs2001strpbf-jsm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irs2001strpbf-jsm.step/irs2001strpbf-jsm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (8 pp, sha256
2a3b11a0ee2281a9, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).