# IRLR120NTR

**UMW** · MOSFETs · TO-252

IRLR120NTR from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE terminal; the datasheet gives gate-to-source ratings of ±16 V (VGS) in the absolute maximum ratings. |
| 2 | D | passive | DRAIN terminal, which is also the tab; the device is rated for VDS = 100 V and continuous drain current ID of 10 A at TC = 25°C. |
| 3 | S | passive | SOURCE terminal; the body diode continuous source current IS is rated at 10 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous Drain Current | ID |  |  | 10 | A | TC=25°C, VGS=10V | 1 |
| Continuous Drain Current | ID |  |  | 7 | A | TC=100°C, VGS=10V | 1 |
| Pulsed Drain Current | IDM |  |  | 35 | A |  | 1 |
| Power Dissipation | PD |  |  | 48 | W | TC=25°C | 1 |
| Linear Derating Factor |  |  |  | 0.32 | W/°C |  | 1 |
| Gate-to-Source Voltage | VGS | -16 |  | 16 | V |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 85 | mJ | Note 2: VDD=25V, starting TJ=25°C, L=4.7mH, RG=25Ω, IAS=6A | 1 |
| Avalanche Current | IAR |  |  | 6 | A |  | 1 |
| Repetitive Avalanche Energy | EAR |  |  | 4.8 | mJ |  | 1 |
| Peak Diode Recovery dv/dt | dv/dt |  |  | 5 | V/ns | Note 3: ISD ≤ 6.0A, di/dt ≤340A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C | 1 |
| Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 175 | °C |  | 1 |
| Soldering Temperature, for 10 seconds |  |  |  | 300 | °C | 1.6mm from case | 1 |
| Junction-to-Case | RθJC |  |  | 3.1 | °C/W |  | 2 |
| Junction-to-Ambient (PCB Mount) | RθJA |  |  | 50 | °C/W | PCB mount | 2 |
| Junction-to-Ambient | RθJA |  |  | 110 | °C/W |  | 2 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 100 |  |  | V | ID=250µA, VGS=0V | 3 |
| Gate Threshold Voltage | VGS(th) | 1 |  | 2 | V | VDS=VGS, ID=250µA | 3 |
| Forward Transconductance | gFS | 3.1 |  |  | S | VDS=25V, ID=6A ⑥ | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 185 | mΩ | VGS=10V, ID=6A ④ | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 225 | mΩ | VGS=5V, ID=6A ④ | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 265 | mΩ | VGS=4V, ID=5A ④ | 3 |
| Drain-to-Source Leakage Current | IDSS |  |  | 25 | µA | VDS=100V, VGS=0V | 3 |
| Drain-to-Source Leakage Current | IDSS |  |  | 250 | µA | VDS=80V, VGS=0V, TJ=150°C | 3 |
| Gate-to-Source Forward Leakage | IGSS |  |  | 100 | nA | VGS=16V | 3 |
| Gate-to-Source Reverse Leakage | IGSS |  |  | -100 | nA | VGS=-16V | 3 |
| Continuous Source Current (Body Diode) | IS |  |  | 10 | A |  | 4 |
| Pulsed Source Current (Body Diode) | ISM |  |  | 35 | A |  | 4 |
| Diode Forward Voltage | VSD |  |  | 1.3 | V | TJ=25°C, IS=6A, VGS=0V ④ | 4 |
| Reverse Recovery Time | trr |  | 110 | 160 | ns | TJ=25°C, IF=6A, dI/dt=100A/µs ④ ⑥ | 4 |
| Reverse Recovery Charge | Qrr |  | 410 | 620 | nC | TJ=25°C, IF=6A, dI/dt=100A/µs ④ ⑥ | 4 |
| Breakdown Voltage Temp. Coefficient | ΔV(BR)DSS/TJ |  | 0.12 |  | V/°C | ID=1mA, reference to 25°C | 3 |
| Total Gate Charge | Qg |  | 20 |  | nC | ID=6A | 3 |
| Gate-to-Source Charge | Qgs |  | 4.6 |  | nC | VDS=80V, VGS=5V | 3 |
| Gate-to-Drain (Miller) Charge | Qgd |  | 10 |  | nC | See Fig. 6 and 13 ④⑥ | 3 |
| Turn-On Delay Time | tD(on) |  | 4 |  | ns | VDD=50V, ID=6A, RG=11Ω, VGS=5V, RD=8.2Ω, See Fig. 10 ④⑥ | 3 |
| Rise Time | tr |  | 35 |  | ns | VDD=50V, ID=6A, RG=11Ω, VGS=5V, RD=8.2Ω, See Fig. 10 ④⑥ | 3 |
| Turn-Off Delay Time | tD(off) |  | 23 |  | ns | VDD=50V, ID=6A, RG=11Ω, VGS=5V, RD=8.2Ω, See Fig. 10 ④⑥ | 3 |
| Fall Time | tf |  | 22 |  | ns | VDD=50V, ID=6A, RG=11Ω, VGS=5V, RD=8.2Ω, See Fig. 10 ④⑥ | 3 |
| Input Capacitance | Ciss |  | 440 |  | pF | VGS=0V, VDS=25V, f = 1.0MHz, See Fig. 5 ⑥ | 3 |
| Output Capacitance | Coss |  | 97 |  | pF | VGS=0V, VDS=25V, f = 1.0MHz, See Fig. 5 ⑥ | 3 |
| Reverse Transfer Capacitance | Crss |  | 50 |  | pF | VGS=0V, VDS=25V, f = 1.0MHz, See Fig. 5 ⑥ | 3 |
| Internal Drain Inductance | LD |  | 4.5 |  | nH | Between lead, 6mm (0.25in.) from package and center of die contact ⑤ | 3 |
| Internal Source Inductance | LS |  | 7.5 |  | nH | Between lead, 6mm (0.25in.) from package and center of die contact ⑤ | 3 |

## CAD (KiCad official)

- Symbol: `IRLR120NTR`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `irlr120ntr-etched.step` / `irlr120ntr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irlr120ntr.step` / `irlr120ntr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](docs/irlr120ntr-datasheet.pdf) (11 pp, sha256 `815016872d292617`, retrieved 2026-11-04, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irlr120ntr-datasheet.pdf)