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IRFR7546TR

UMW · MOSFETs · TO-252

IRFR7546TR from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE terminal; the datasheet gives a gate-to-source voltage rating of ±20 V (VGS).
2 D passive DRAIN terminal; the device is rated for VDS = 60 V.
3 S passive SOURCE terminal, the return path for the gate and drain currents.

Key specifications

Parameter Value
Manufacturer UMW
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Breakdown Voltage V(BR)DSS 60 V ID=250µA, VGS=0V 3
Gate Threshold Voltage VGS(th) 2.1 3.7 V VDS=VGS, ID=100μA 3
Static Drain-to-Source On-Resistance RDS(ON) 6.6 7.9 mΩ VGS=10V, ID=43A 3
Drain-to-Source Leakage Current IDSS 1 µA VDS=60V, VGS=0V 3
Drain-to-Source Leakage Current IDSS 150 µA VDS=60V, VGS=0V, TJ=125°C 3
Gate-to-Source Forward Leakage IGSS 100 nA VGS=20V 3
Gate-to-Source Reverse Leakage IGSS -100 nA VGS=-20V 3
Forward Transconductance gFS 58 S VDS=25V, ID=43A 3
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 71 A TC=25°C 1
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 50 A TC=100°C 1
Continuous Drain Current, VGS @ 10V (Wire Bond Limited) ID 56 A TC=25°C 1
Pulsed Drain Current IDM 280 A TC=25°C 1
Maximum Power Dissipation PD 99 W TC=25°C 1
Linear Derating Factor 0.66 W/°C 1
Gate-to-Source Voltage VGS -20 20 V 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 175 °C 1
Soldering Temperature 300 °C 10 s, 1.6mm from case 1
Single Pulse Avalanche Energy (③) EAS(Thermally limited) 120 mJ L=130µH, RG=50Ω, IAS=43A, VGS=10V 2
Single Pulse Avalanche Energy (⑨) EAS(Thermally limited) 178 mJ L=1mH, RG=50Ω, IAS=19A, VGS=10V 2
Junction-to-Case RθJC 1.52 °C/W 2
Junction-to-Ambient (PCB Mount) RθJA 50 °C/W 2
Junction-to-Ambient RθJA 100 °C/W 2
Breakdown Voltage Temp. Coefficient ΔV(BR)DSS/ΔTJ 56 mV/°C ID=1mA, Reference to 25°C 3
Static Drain-to-Source On-Resistance RDS(ON) 8.5 mΩ VGS=6V, ID=21A 3
Gate Resistance Rg 1.5 Ω 3
Total Gate Charge Qg 47 nC ID=43A, VDS=30V, VGS=10V 3
Gate-to-Source Charge Qgs 14 nC ID=43A, VDS=30V, VGS=10V 3
Gate-to-Drain (Miller) Charge Qgd 18 nC ID=43A, VDS=30V, VGS=10V 3
Total Gate Charge Sync. (Qg-Qgd) Qsync 26 nC ID=43A, VDS=30V, VGS=10V 3
Turn-On Delay Time tD(on) 8.1 ns VDD=30V, ID=43A, RG=2.7Ω, VGS=10V 3
Rise Time tr 28 ns VDD=30V, ID=43A, RG=2.7Ω, VGS=10V 3
Turn-Off Delay Time tD(off) 36 ns VDD=30V, ID=43A, RG=2.7Ω, VGS=10V 3
Fall Time tf 20 ns VDD=30V, ID=43A, RG=2.7Ω, VGS=10V 3
Input Capacitance Ciss 3020 pF VGS=0V, VDS=25V, ƒ=1MHz 3
Output Capacitance Coss 280 pF VGS=0V, VDS=25V, ƒ=1MHz 3
Reverse Transfer Capacitance Crss 180 pF VGS=0V, VDS=25V, ƒ=1MHz 3
Effective Output Capacitance (Energy Related) Cosseff.(ER) 290 pF VGS=0V, VDS=0V to 48V ⑦ 3
Effective Output Capacitance (Time Related) Cosseff.(TR) 370 pF VGS=0V, VDS=0V to 48V ⑥ 3

CAD (KiCad official)

  • Symbol: IRFR7546TR
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: irfr7546tr-etched.step / irfr7546tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irfr7546tr.step / irfr7546tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (13 pp, sha256 4d538d0e53d7f42a, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF