# IRF7854TRPBF

**Infineon Technologies** · MOSFETs · SO-8

IRF7854TRPBF from Infineon Technologies, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the MOSFET; absolute maximum VDS is 80 V and VGS is limited to ±20 V. |
| 2 | S | passive | Source terminal of the MOSFET; absolute maximum VDS is 80 V and VGS is limited to ±20 V. |
| 3 | S | passive | Source terminal of the MOSFET; absolute maximum VDS is 80 V and VGS is limited to ±20 V. |
| 4 | G | input | Gate terminal; VGS is limited to ±20 V and RDS(on) is specified at VGS = 10 V. |
| 5 | D | passive | Drain terminal; VDSS is 80 V and continuous ID is 10 A at TA = 25°C with VGS = 10 V. |
| 6 | D | passive | Drain terminal; VDSS is 80 V and continuous ID is 10 A at TA = 25°C with VGS = 10 V. |
| 7 | D | passive | Drain terminal; VDSS is 80 V and continuous ID is 10 A at TA = 25°C with VGS = 10 V. |
| 8 | D | passive | Drain terminal; VDSS is 80 V and continuous ID is 10 A at TA = 25°C with VGS = 10 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDS |  |  | 80 | V |  | 1 |
| Gate-to-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID |  |  | 10 | A | TA = 25°C, VGS @ 10V | 1 |
| Continuous Drain Current | ID |  |  | 7.9 | A | TA = 70°C, VGS @ 10V | 1 |
| Pulsed Drain Current | IDM |  |  | 79 | A | Repetitive rating; pulse width limited by max. junction temperature | 1 |
| Maximum Power Dissipation | PD |  |  | 2.5 | W | TA = 25°C | 1 |
| Linear Derating Factor |  |  |  | 0.02 | W/°C |  | 1 |
| Peak Diode Recovery dv/dt | dv/dt |  |  | 11 | V/ns | ISD ≤ 6.0A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C | 1 |
| Operating Junction Temperature | TJ | -55 |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Junction-to-Drain Lead Thermal Resistance | RθJL |  |  | 20 | °C/W | Junction-to-Drain Lead | 1 |
| Junction-to-Ambient Thermal Resistance | RθJA |  |  | 50 | °C/W | PCB Mount; 1 inch square copper board, t ≤ 10 sec | 1 |
| Drain-to-Source Breakdown Voltage | V(BR)DSS | 80 |  |  | V | VGS = 0V, ID = 250µA | 2 |
| Static Drain-to-Source On-Resistance | RDS(on) |  | 11 | 13.4 | mΩ | VGS = 10V, ID = 10A | 2 |
| Gate Threshold Voltage | VGS(th) | 3 |  | 4.9 | V | VDS = VGS, ID = 100µA | 2 |
| Drain-to-Source Leakage Current | IDSS |  |  | 20 | µA | VDS = 80V, VGS = 0V | 2 |
| Drain-to-Source Leakage Current | IDSS |  |  | 250 | µA | VDS = 80V, VGS = 0V, TJ = 125°C | 2 |
| Gate-to-Source Forward Leakage | IGSS |  |  | 100 | nA | VGS = 20V | 2 |
| Gate-to-Source Reverse Leakage | IGSS |  |  | -100 | nA | VGS = -20V | 2 |
| Forward Transconductance | gfs | 12 |  |  | S | VDS = 25V, ID = 6.0A | 2 |
| Total Gate Charge | Qg |  | 27 | 41 | nC |  | 2 |
| Single Pulse Avalanche Energy | EAS |  |  | 110 | mJ | Starting TJ = 25°C, L = 6.0mH, RG = 25Ω, IAS = 6.0A | 2 |
| Avalanche Current | IAR |  |  | 6 | A |  | 2 |
| Continuous Source Current (Body Diode) | IS |  |  | 2.3 | A |  | 2 |
| Pulsed Source Current (Body Diode) | ISM |  |  | 79 | A |  | 2 |
| Diode Forward Voltage | VSD |  |  | 1.3 | V | TJ = 25°C, IS = 6.0A, VGS = 0V | 2 |
| Reverse Recovery Time | trr |  | 43 | 65 | ns | TJ = 25°C, IF = 6.0A, VDD = 25V, di/dt = 100A/µs | 2 |
| Reverse Recovery Charge | Qrr |  | 76 | 110 | nC | TJ = 25°C, IF = 6.0A, VDD = 25V, di/dt = 100A/µs | 2 |

## CAD (KiCad official)

- Symbol: `IRF7854TRPBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `irf7854trpbf-etched.step` / `irf7854trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7854trpbf.step` / `irf7854trpbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881132905095168) (8 pp, sha256 `02b5ff6dd326a9ff`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irf7854trpbf-datasheet.pdf)