IRF7403TR

{
  "slug": "irf7403tr",
  "version": "0.1.0",
  "type": "component",
  "description": "UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "transistors-thyristors",
    "irf7403tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "irf7403tr.kicad_sym",
    "irf7403tr.kicad_mod",
    "irf7403tr.glb",
    "irf7403tr.step",
    "irf7403tr.lbr",
    "docs/hero.png",
    "docs/irf7403tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "irf7403tr-hero.glb",
    "irf7403tr-hero.overlay.json",
    "irf7403tr-etched.glb"
  ],
  "component": {
    "mpn": "IRF7403TR",
    "manufacturer": "UMW",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879046880342016",
    "parts": {
      "symbol": "irf7403tr.kicad_sym",
      "footprint": "irf7403tr.kicad_mod",
      "model_3d": "irf7403tr-hero.glb",
      "model_3d_plain": "irf7403tr-etched.glb",
      "model_3d_step": "irf7403tr-etched.step",
      "model_3d_step_plain": "irf7403tr.step",
      "lbr": "irf7403tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C5252445"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T21:45:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "S",
        "type": "passive",
        "description": "SOURCE terminal of the N-channel MOSFET (pins 1, 2 and 3 are all listed as SOURCE in the pinning table)."
      },
      {
        "number": "2",
        "name": "S",
        "type": "passive",
        "description": "SOURCE terminal of the N-channel MOSFET (pins 1, 2 and 3 are all listed as SOURCE in the pinning table)."
      },
      {
        "number": "3",
        "name": "S",
        "type": "passive",
        "description": "SOURCE terminal of the N-channel MOSFET (pins 1, 2 and 3 are all listed as SOURCE in the pinning table)."
      },
      {
        "number": "4",
        "name": "G",
        "type": "input",
        "description": "GATE terminal; the datasheet rates gate-to-source voltage VGS at ±20 V."
      },
      {
        "number": "5",
        "name": "D",
        "type": "passive",
        "description": "DRAIN terminal (pins 5, 6, 7 and 8 are all listed as DRAIN in the pinning table); drain-source breakdown voltage V(BR)DSS is 30 V."
      },
      {
        "number": "6",
        "name": "D",
        "type": "passive",
        "description": "DRAIN terminal (pins 5, 6, 7 and 8 are all listed as DRAIN in the pinning table); drain-source breakdown voltage V(BR)DSS is 30 V."
      },
      {
        "number": "7",
        "name": "D",
        "type": "passive",
        "description": "DRAIN terminal (pins 5, 6, 7 and 8 are all listed as DRAIN in the pinning table); drain-source breakdown voltage V(BR)DSS is 30 V."
      },
      {
        "number": "8",
        "name": "D",
        "type": "passive",
        "description": "DRAIN terminal (pins 5, 6, 7 and 8 are all listed as DRAIN in the pinning table); drain-source breakdown voltage V(BR)DSS is 30 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives no per-pin electrical limits; pin descriptions combine the pinning table with de; KiCad pin types are my mapping (MOSFET source/drain as passive, gate as input); the datasheet does n; Pin numbering follows the SOP-8 pinning table (S = 1,2,3; G = 4; D = 5,6,7,8) and the package drawin"
        ],
        "pages_sent": 11,
        "cost_usd": 0.0434,
        "at": "2026-10-17T21:43:20"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879046880342016",
        "pages": 11,
        "sha256": "691f836c39c319c0",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "irf7403tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "irf7403tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7454c0e124a7cda071bb625fc08f36745b7f580416292a5f58ba06615667e41a",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}