component

IRF7309TRPBF

Public Made by Adom

by adom

TECH PUBLIC MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsirf7309trpbffactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3h ago
viewers irf7309trpbf: viewers · Ray 3h ago
irf7309trpbf-etched.glb irf7309trpbf: factory component page (tier=lcsc) · Ray 3h ago
irf7309trpbf-etched.step irf7309trpbf: factory component page (tier=lcsc) · Ray 3h ago
irf7309trpbf-hero.glb irf7309trpbf: hero GLB from the etched model (keeps the MPN mark) · Ray 3h ago
irf7309trpbf-hero.overlay.json Publish 0.1.0 · Ray 3h ago
irf7309trpbf.glb Publish 0.1.0 · Ray 3h ago
irf7309trpbf.kicad_mod Publish 0.1.0 · Ray 3h ago
irf7309trpbf.kicad_sym Publish 0.1.0 · Ray 3h ago
irf7309trpbf.lbr Publish 0.1.0 · Ray 3h ago
irf7309trpbf.step Publish 0.1.0 · Ray 3h ago
package.json Publish 0.1.0 · Ray 3h ago
page.json irf7309trpbf: factory component page (tier=lcsc) · Ray 3h ago
README.md Publish 0.1.0 · Ray 3h ago

IRF7309TRPBF

TECH PUBLIC · MOSFETs · SOP-8

IRF7309TRPBF from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, BVDSS 30V, RDS(on) 22mΩ, ID 7A) per the SOP-8 pin drawing and circuit diagram.
2 G1 input Gate of MOSFET 1 (N-channel); VGS absolute maximum ±20V, threshold 1V min to 2.5V max at ID=250uA.
3 S2 passive Source of MOSFET 2 (P-channel, BVDSS -30V, RDS(on) 30mΩ, ID -6.0A) per the SOP-8 pin drawing and circuit diagram.
4 G2 input Gate of MOSFET 2 (P-channel); VGS absolute maximum ±20V, threshold -1V min to -2.5V max at ID=-250uA.
5 D2 passive Drain of MOSFET 2 (P-channel); VDS limit -30V, continuous ID -6A at TA=25°C, pulsed -24A.
6 D2 passive Drain of MOSFET 2 (P-channel), connected internally to the same drain as pin 5; VDS limit -30V.
7 D1 passive Drain of MOSFET 1 (N-channel); VDS limit 30V, continuous ID 7A at TA=25°C, pulsed 28A.
8 D1 passive Drain of MOSFET 1 (N-channel), connected internally to the same drain as pin 7; VDS limit 30V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: IRF7309TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: irf7309trpbf-etched.step / irf7309trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf7309trpbf.step / irf7309trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (6 pp, sha256 a16bee3faf9a4efd, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF