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IRF7307TR

Public Made by Adom

by adom

UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 28d ago
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irf7307tr-etched.step irf7307tr: factory component page (tier=lcsc) · Ray 28d ago
irf7307tr-hero.glb irf7307tr: hero GLB from the etched model (keeps the MPN mark) · Ray 28d ago
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IRF7307TR

UMW · MOSFETs · SOP-8

IRF7307TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of the channel-1 MOSFET; the datasheet gives no pin-level limit, so the device ratings apply (VGS ±12 V, continuous drain current 5.7 A N-ch / -4.7 A P-ch at TA=25°C).
2 G1 input Gate terminal of the channel-1 MOSFET; gate-to-source voltage is rated ±12 V absolute maximum.
3 S2 passive Source terminal of the channel-2 MOSFET; the datasheet gives no pin-level limit, so the device ratings apply (VGS ±12 V, continuous drain current 5.7 A N-ch / -4.7 A P-ch at TA=25°C).
4 G2 input Gate terminal of the channel-2 MOSFET; gate-to-source voltage is rated ±12 V absolute maximum.
5 D2 passive Drain terminal of the channel-2 MOSFET; drain is rated for the device's continuous and pulsed drain current limits (e.g., 21 A pulsed N-ch, -17 A pulsed P-ch at TA=25°C).
6 D2 passive Drain terminal of the channel-2 MOSFET; drain is rated for the device's continuous and pulsed drain current limits (e.g., 21 A pulsed N-ch, -17 A pulsed P-ch at TA=25°C).
7 D1 passive Drain terminal of the channel-1 MOSFET; drain is rated for the device's continuous and pulsed drain current limits (e.g., 21 A pulsed N-ch, -17 A pulsed P-ch at TA=25°C).
8 D1 passive Drain terminal of the channel-1 MOSFET; drain is rated for the device's continuous and pulsed drain current limits (e.g., 21 A pulsed N-ch, -17 A pulsed P-ch at TA=25°C).

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: IRF7307TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: irf7307tr-etched.step / irf7307tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf7307tr.step / irf7307tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (14 pp, sha256 c8bbb7e2ee90e3b6, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF