IR2183STRPBF

{
  "slug": "ir2183strpbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Infineon Technologies Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "motor driver ics",
    "ir2183strpbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ir2183strpbf.kicad_sym",
    "ir2183strpbf.kicad_mod",
    "ir2183strpbf.glb",
    "ir2183strpbf.step",
    "ir2183strpbf.lbr",
    "docs/hero.png",
    "docs/ir2183strpbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ir2183strpbf-hero.glb",
    "ir2183strpbf-hero.overlay.json",
    "ir2183strpbf-etched.glb"
  ],
  "component": {
    "mpn": "IR2183STRPBF",
    "manufacturer": "Infineon Technologies",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Motor Driver ICs",
    "subcategory": "Gate Drivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590153142618271744",
    "parts": {
      "symbol": "ir2183strpbf.kicad_sym",
      "footprint": "ir2183strpbf.kicad_mod",
      "model_3d": "ir2183strpbf-hero.glb",
      "model_3d_plain": "ir2183strpbf-etched.glb",
      "model_3d_step": "ir2183strpbf-etched.step",
      "model_3d_step_plain": "ir2183strpbf.step",
      "lbr": "ir2183strpbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C2653806"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T19:13:16Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "HIN",
        "type": "input",
        "description": "Logic input for the high side gate driver output (HO), in phase and referenced to COM; VIH minimum is 2.7 V, VIL maximum is 0.8 V, and the pin is internally clamped with a 5.2 V zener diode."
      },
      {
        "number": "2",
        "name": "LIN",
        "type": "input",
        "description": "Logic input for the low side gate driver output (LO), out of phase and referenced to COM; VIH minimum is 2.7 V, VIL maximum is 0.8 V, and the pin is internally clamped with a 5.2 V zener diode."
      },
      {
        "number": "3",
        "name": "COM",
        "type": "power_in",
        "description": "Low side return; all voltage parameters in the absolute maximum ratings are referenced to COM."
      },
      {
        "number": "4",
        "name": "LO",
        "type": "output",
        "description": "Low side gate driver output, switching between 0 V and VCC, with pulsed source current of at least 1.4 A and sink current of at least 1.8 A (PW ≤ 10 µs)."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Low side and logic fixed supply, recommended operating range 10 V to 20 V (absolute maximum -0.3 V to 25 V)."
      },
      {
        "number": "6",
        "name": "VS",
        "type": "power_in",
        "description": "High side floating supply return, with offset voltage recommended up to 600 V and allowable dVS/dt transient of 50 V/ns."
      },
      {
        "number": "7",
        "name": "HO",
        "type": "output",
        "description": "High side floating gate driver output, operating between VS and VB (VHO absolute range VS - 0.3 V to VB + 0.3 V)."
      },
      {
        "number": "8",
        "name": "VB",
        "type": "power_in",
        "description": "High side floating supply, recommended operating range VS + 10 V to VS + 20 V (absolute maximum 625 V)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN suffix 'TR' (tape and reel) is not listed in the datasheet. The ordering table (page 22) lis; Pin types for VS (passive) and COM (power_in) are my classification choices, not stated in the datas; The datasheet gives a single 8-lead SOIC lead assignment for both IR2183 and IR2183S (page 5); no se"
        ],
        "pages_sent": 22,
        "cost_usd": 0.0614,
        "at": "2026-10-18T19:13:01"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590153142618271744",
        "pages": 22,
        "sha256": "a4ff215a37fe3822",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "ir2183strpbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ir2183strpbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cb11f4630c1c53cce4aea392ebbf1d39405023924afa450c730cd8f2550a5543",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}