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IR11688STRPBF

Infineon Technologies · Gate Drive ICs · SOIC-8

IR11688STRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE1 output Gate drive output 1 for SR MOSFET 1 with +1A/-4A peak drive capability, gate clamped to Vcc+0.3V max.
2 VCC power_in Supply voltage pin monitored by UVLO, operating range 4.75V to 18V (abs max 20V), needs a ceramic decoupling capacitor to GND, internally clamped around 20V.
3 MOT passive Minimum on time programming pin set by an external resistor to GND (20kΩ to 150kΩ), typically programming 500ns to 2µs, max pin voltage 3.5V.
4 VD1 input Sync FET 1 drain voltage sense input rated -1V to 200V continuous (-3V pulse), with at most a ≤1kΩ series resistor and pF-range capacitor filter.
5 VD2 input Sync FET 2 drain voltage sense input rated -1V to 200V continuous (-3V pulse), with at most a ≤1kΩ series resistor and pF-range capacitor filter.
6 VS power_in Sync FET source voltage sense (signal ground for the SR MOSFET sources), rated -1V to 5V, Kelvin connect to MOSFET2 source if the MOSFETs are far apart.
7 GND power_in Analog and power ground to which internal circuit blocks and gate drivers are referenced.
8 GATE2 output Gate drive output 2 for SR MOSFET 2 with +1A/-4A peak drive capability, gate clamped to Vcc+0.3V max.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Operating Range VCC 4.75 18 V 6
VCC Turn On Threshold VCC ON 4.35 4.55 4.75 V 6
VCC Turn Off Threshold VCC UVLO 4.15 4.35 4.55 V Under Voltage Lock Out 6
VCC Turn On/Off Hysteresis VCC HYST 0.2 V 6
Operating Current ICC 13 15 mA CLOAD =1nF, fSW = 400kHz, RMOT=50kΩ 6
Quiescent Current IQCC 320 500 µA No switching at VD pins and after TWAIT is exceeded, VD=2V, RMOT=50kΩ 6
Start-up Current ICC START 40 80 µA VCC=VCC ON - 0.1V 6
Quiescent waiting time TWAIT 340 570 800 µS 6
Turn-off Threshold VTH1 -7 -4 0 mV VS=0V 6
Regulation Threshold VTHR -50 -40 -30 mV 10mV hysteresis (-50mV/-40mV) 6
Turn-on Threshold VTH2 -263 -230 -197 mV 6
Hysteresis VHYST 230 mV GBD 6
Input Bias Current IIBIAS1 -7.5 -5 µA VD = -50mV 6
Input Bias Current IIBIAS2 7 10 µA VD = 200V 6
Turn-on Blanking time TBon 150 ns GBD 6
Blanking pulse duration tBLANK 8 15 24 µs 6
Reset Threshold VTH3 1.06 1.18 1.31 V 6
Reset Delay tBRST 400 ns 6
Hysteresis VHYST3 40 mV GBD 6
Minimum on time TOnmin 375 500 625 ns RMOT =24kΩ, VCC=5V 6
Minimum on time TOnmin 0.75 1 1.25 µs RMOT =50kΩ, VCC=5V 6
Gate Low Voltage VGLO 0.15 0.25 V IGATE = 100mA 7
Gate High Voltage VGTH 11.9 V GBD 7
Gate High Voltage VGTH 4.9 V GBD 7
Rise Time tr 20 38 ns CLOAD = 1nF 7
Fall Time tf 10 22 ns CLOAD = 1nF 7
Turn on Propagation Delay tDon 200 250 ns VDS to VGATE, VDS goes down from 6V to -1V 7
Turn off Propagation Delay tDoff 42 60 ns VDS to VGATE -VDS goes up from -1V to 6V 7
Pull up Resistance rup 6 Ω GBD 7
Pull down Resistance rdown 1.5 Ω IGATE = -100mA 7
Output Peak Current (source) IO source 1 A GBD 7
Output Peak Current (sink) IO sink 4 A GBD 7
Supply Voltage VCC -0.3 20 V 5
Cont. Drain Sense Voltage VD1,2 -1 200 V 5
Pulse Drain Sense Voltage VD1,2 -3 200 V 5
Source Sense Voltage VS -1 5 V 5
Gate Voltage VGATE1,2 -0.3 V max Vcc+0.3 V 5
MOT Voltage VMOT -0.3 3.5 V 5
Operating Junction Temperature TJ -40 150 °C 5
Storage Temperature TS -55 150 °C 5
Thermal Resistance RθJA 128 °C/W SOIC-8 5
Package Power Dissipation PD 970 mW SOIC-8, TAMB=25°C 5
Supply voltage VCC 4.75 18 V 5
Drain Sense Voltage VD -3 200 V -3V negative spike width ≤100ns 5
Junction Temperature TJ -40 125 °C 5
Switching Frequency Fsw 400 kHz 5
MOT pin resistor value RMOT 20 150 kΩ 5

CAD (KiCad official)

  • Symbol: IR11688STRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ir11688strpbf-etched.step / ir11688strpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir11688strpbf.step / ir11688strpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (27 pp, sha256 f56e8cc22a4abcd4, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF