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IPD65R400CE
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Infineon Technologies MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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IPD65R400CE
Infineon Technologies · MOSFETs · TO-252
IPD65R400CE from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate of the MOSFET, with VGS limited to ±20 V static and ±30 V dynamic (AC, f>1 Hz), and an internal gate resistance RG of 7.5 Ω typical. |
| 2 | Drain | passive | Drain of the MOSFET, electrically connected to the tab, rated for VDS up to 700 V at Tj,max with continuous drain current ID of 15.1 A at TC=25°C. |
| 3 | Source | passive | Source of the MOSFET, serving as the reference for the gate-source voltage ratings (VGS ±20 V static, ±30 V dynamic). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 650 | V | VGS=0V,ID=1mA | 5 | ||
| Gate threshold voltage | V(GS)th | 2.5 | 3 | 3.5 | V | VDS=VGS,ID=0.32mA | 5 |
| Zero gate voltage drain current | IDSS | 10 | µA | VDS=650,VGS=0V,Tj=25°C | 5 | ||
| Gate-source leakage current | IGSS | 100 | nA | VGS=20V,VDS=0V | 5 | ||
| Drain-source on-state resistance | RDS(on) | 0.36 | 0.4 | Ω | VGS=10V,ID=3.2435A,Tj=25°C | 5 | |
| Continuous drain current (TC=25°C) | ID | 15.1 | A | TC=25°C | 3 | ||
| Continuous drain current (TC=100°C) | ID | 9.5 | A | TC=100°C | 3 | ||
| Pulsed drain current | ID,pulse | 30 | A | TC=25°C | 3 | ||
| Avalanche energy, single pulse | EAS | 215 | mJ | ID=1.8A; VDD=50V; see table 10 | 3 | ||
| Avalanche energy, repetitive | EAR | 0.32 | mJ | ID=1.8A; VDD=50V; see table 10 | 3 | ||
| Avalanche current, repetitive | IAR | 1.8 | A | 3 | |||
| MOSFET dv/dt ruggedness | dv/dt | 50 | V/ns | VDS=0...480V | 3 | ||
| Gate source voltage (static) | VGS | -20 | 20 | V | static; | 3 | |
| Gate source voltage (dynamic) | VGS | -30 | 30 | V | AC (f>1 Hz) | 3 | |
| Power dissipation (Non FullPAK), TO-252, TO-251 | Ptot | 118 | W | TC=25°C | 3 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 3 | ||
| Operating junction temperature | Tj | -55 | 150 | °C | 3 | ||
| Continuous diode forward current | IS | 10.6 | A | TC=25°C | 3 | ||
| Diode pulse current | IS,pulse | 30 | A | TC=25°C | 3 | ||
| Reverse diode dv/dt | dv/dt | 15 | V/ns | VDS=0...400V,ISD<=IS,Tj=25°C | 3 | ||
| Maximum diode commutation speed | dif/dt | 500 | A/µs | VDS=0...400V,ISD<=IS,Tj=25°C | 3 | ||
| Thermal resistance, junction - case | RthJC | 1.06 | °C/W | 4 | |||
| Thermal resistance, junction - ambient | RthJA | 62 | °C/W | leaded | 4 | ||
| Soldering temperature, wavesoldering | Tsold | 260 | °C | only allowed at leads; 1.6mm (0.063 in.) from case for 10s | 4 |
CAD (KiCad official)
- Symbol:
IPD65R400CE - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
ipd65r400ce-etched.step/ipd65r400ce-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ipd65r400ce.step/ipd65r400ce.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (15 pp, sha256
36ff661b1699d43d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# IPD65R400CE
**Infineon Technologies** · MOSFETs · TO-252
IPD65R400CE from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate of the MOSFET, with VGS limited to ±20 V static and ±30 V dynamic (AC, f>1 Hz), and an internal gate resistance RG of 7.5 Ω typical. |
| 2 | Drain | passive | Drain of the MOSFET, electrically connected to the tab, rated for VDS up to 700 V at Tj,max with continuous drain current ID of 15.1 A at TC=25°C. |
| 3 | Source | passive | Source of the MOSFET, serving as the reference for the gate-source voltage ratings (VGS ±20 V static, ±30 V dynamic). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 650 | | | V | VGS=0V,ID=1mA | 5 |
| Gate threshold voltage | V(GS)th | 2.5 | 3 | 3.5 | V | VDS=VGS,ID=0.32mA | 5 |
| Zero gate voltage drain current | IDSS | | | 10 | µA | VDS=650,VGS=0V,Tj=25°C | 5 |
| Gate-source leakage current | IGSS | | | 100 | nA | VGS=20V,VDS=0V | 5 |
| Drain-source on-state resistance | RDS(on) | | 0.36 | 0.4 | Ω | VGS=10V,ID=3.2435A,Tj=25°C | 5 |
| Continuous drain current (TC=25°C) | ID | | | 15.1 | A | TC=25°C | 3 |
| Continuous drain current (TC=100°C) | ID | | | 9.5 | A | TC=100°C | 3 |
| Pulsed drain current | ID,pulse | | | 30 | A | TC=25°C | 3 |
| Avalanche energy, single pulse | EAS | | | 215 | mJ | ID=1.8A; VDD=50V; see table 10 | 3 |
| Avalanche energy, repetitive | EAR | | | 0.32 | mJ | ID=1.8A; VDD=50V; see table 10 | 3 |
| Avalanche current, repetitive | IAR | | | 1.8 | A | | 3 |
| MOSFET dv/dt ruggedness | dv/dt | | | 50 | V/ns | VDS=0...480V | 3 |
| Gate source voltage (static) | VGS | -20 | | 20 | V | static; | 3 |
| Gate source voltage (dynamic) | VGS | -30 | | 30 | V | AC (f>1 Hz) | 3 |
| Power dissipation (Non FullPAK), TO-252, TO-251 | Ptot | | | 118 | W | TC=25°C | 3 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 3 |
| Operating junction temperature | Tj | -55 | | 150 | °C | | 3 |
| Continuous diode forward current | IS | | | 10.6 | A | TC=25°C | 3 |
| Diode pulse current | IS,pulse | | | 30 | A | TC=25°C | 3 |
| Reverse diode dv/dt | dv/dt | | | 15 | V/ns | VDS=0...400V,ISD<=IS,Tj=25°C | 3 |
| Maximum diode commutation speed | dif/dt | | | 500 | A/µs | VDS=0...400V,ISD<=IS,Tj=25°C | 3 |
| Thermal resistance, junction - case | RthJC | | | 1.06 | °C/W | | 4 |
| Thermal resistance, junction - ambient | RthJA | | | 62 | °C/W | leaded | 4 |
| Soldering temperature, wavesoldering | Tsold | | | 260 | °C | only allowed at leads; 1.6mm (0.063 in.) from case for 10s | 4 |
## CAD (KiCad official)
- Symbol: `IPD65R400CE`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `ipd65r400ce-etched.step` / `ipd65r400ce-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ipd65r400ce.step` / `ipd65r400ce.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885494234533888) (15 pp, sha256 `36ff661b1699d43d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ipd65r400ce-datasheet.pdf)