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IPD50N10S3L16

Infineon Technologies · MOSFETs · TO-252

IPD50N10S3L16 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate pin; gate-source voltage is rated ±20 V (VGS(th) 1.2 to 2.4 V at ID=60 µA).
2 D passive Drain pin, also the tab; VDS is 100 V and continuous drain current is 50 A at TC=25 °C.
3 S passive Source pin; carries the 50 A continuous drain current at TC=25 °C, VGS=10 V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 100 V VGS=0V, ID=1mA 2
Gate threshold voltage VGS(th) 1.2 1.7 2.4 V VDS=VGS, ID=60µA 2
Zero gate voltage drain current IDSS 0.01 0.1 µA VDS=80V, VGS=0V, Tj=25°C 2
Zero gate voltage drain current IDSS 0.1 10 µA VDS=80V, VGS=0V, Tj=125°C 2
Gate-source leakage current IGSS 100 nA VGS=16V, VDS=0V 2
Drain-source on-state resistance RDS(on) 15.3 19.9 mW VGS=4.5V, ID=50A 2
Drain-source on-state resistance RDS(on) 12.5 15 mW VGS=10 V, ID=50 A 2
Input capacitance Ciss 3215 4180 pF VGS=0V, VDS=25V, f=1MHz 3
Output capacitance Coss 730 950 pF VGS=0V, VDS=25V, f=1MHz 3
Reverse transfer capacitance Crss 63 95 pF VGS=0V, VDS=25V, f=1MHz 3
Gate to source charge Qgs 9 12 nC VDD=80V, ID=50A, VGS=0 to 10V 3
Gate to drain charge Qgd 8 12 nC VDD=80V, ID=50A, VGS=0 to 10V 3
Gate charge total Qg 49 64 nC VDD=80V, ID=50A, VGS=0 to 10V 3
Diode continuous forward current IS 50 A TC=25°C 3
Diode pulse current IS,pulse 200 A TC=25°C 3
Diode forward voltage VSD 0.6 1 1.2 V VGS=0V, IF=50A, Tj=25°C 3
Thermal resistance, junction - case RthJC 1.5 K/W 2
Thermal resistance, junction - ambient RthJA 62 K/W SMD version, device on PCB, minimal footprint 2
Thermal resistance, junction - ambient RthJA 40 K/W SMD version, device on PCB, 6 cm2 cooling area 2
Continuous drain current ID 50 A TC=25°C, VGS=10V 1
Continuous drain current ID 38 A TC=100°C, VGS=10V 1
Pulsed drain current ID,pulse 200 A TC=25°C 1
Avalanche energy, single pulse EAS 330 mJ ID=25A 1
Avalanche current, single pulse IAS 50 A 1
Gate source voltage VGS -20 20 V -5V to -20V for max. 168 non-consecutive hours 1
Power dissipation Ptot 100 W TC=25 °C 1
Operating and storage temperature Tj, Tstg -55 175 °C 1
Drain-source voltage VDS 100 V Product summary 1
Turn-on delay time td(on) 10 ns VDD=20V, VGS=10V, ID=50A, RG=3.5W 3
Rise time tr 5 ns VDD=20V, VGS=10V, ID=50A, RG=3.5W 3
Turn-off delay time td(off) 29 ns VDD=20V, VGS=10V, ID=50A, RG=3.5W 3
Fall time tf 5 ns VDD=20V, VGS=10V, ID=50A, RG=3.5W 3
Gate plateau voltage Vplateau 3.7 V VDD=80V, ID=50A, VGS=0 to 10V 3
Reverse recovery time trr 97 ns VR=50V, IF=IS, diF/dt=100A/µs 3
Reverse recovery charge Qrr 178 nC VR=50V, IF=IS, diF/dt=100A/µs 3

CAD (KiCad official)

  • Symbol: IPD50N10S3L16
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd50n10s3l16-etched.step / ipd50n10s3l16-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd50n10s3l16.step / ipd50n10s3l16.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 4aa19cc6c1e9c1ba, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF