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INA103KP

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Texas Instruments Instrumentation OpAmps, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifiersina103kpfactory-2.0.0extractor-text

Verified INA103KP

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: INA103KP · PDIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 24-page datasheet
  • ✓distributor: lcsc C1346581, digikey INA103KP-ND, mouser 595-INA103KP
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-c14u7_3n/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ina103kp.kicad_sym✓ ina103kp.kicad_mod✓ ina103kp.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ina103kp: hero re-rendered with the chip (after the 10-30 render outage) · Ray 4d ago
viewers ina103kp: viewers · Ray 4d ago
ina103kp-etched.glb Publish 0.1.0 · Ray 4d ago
ina103kp-etched.step ina103kp: factory component page (tier=mfr) · Ray 4d ago
ina103kp-hero.glb ina103kp: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
ina103kp-hero.overlay.json Publish 0.1.0 · Ray 4d ago
ina103kp.glb Publish 0.1.0 · Ray 4d ago
ina103kp.kicad_mod Publish 0.1.0 · Ray 4d ago
ina103kp.kicad_sym Publish 0.1.0 · Ray 4d ago
ina103kp.lbr Publish 0.1.0 · Ray 4d ago
ina103kp.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 4d ago

INA103KP

Texas Instruments · Instrumentation OpAmps · PDIP-16

INA103KP from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +Input input Non-inverting input of the balanced differential pair, with differential input impedance of 60
2 +Gain Sense input Positive gain-sense terminal; an external gain resistor RG is connected between pins 2 and 15 to set gains other than 1 and 100, and connections must be kept short to avoid oscillation.
3 +Offset Null passive Offset-null terminal used with the external trim circuit of Figure 3 (offset adjust range ±250 mV in that circuit) to null the input offset voltage with zero differential input.
4 -Offset Null passive Offset-null terminal used together with pin 3 in the external offset trim circuit to null the input offset voltage with zero differential input.
5 +Gain Drive output Positive gain-drive connection of the input stage that feeds the internal gain-setting network (pin 6 is +RG).
6 +RG passive Positive internal gain-resistor connection; for G = 100 V/V pin 14 is connected to pin 6.
7 Ref input Output reference terminal that should be a low-impedance connection, since a few ohms in series degrades common-mode rejection.
8 V- power_in Negative power supply; supply range is ±9 V to ±25 V and supplies should be bypassed with 1 µF tantalum capacitors near the device pins.
9 V+ power_in Positive power supply; supply range is ±9 V to ±25 V and supplies should be bypassed with 1 µF tantalum capacitors near the device pins.
10 Output output Amplifier output with output current of ±40 mA minimum over temperature (TMIN to TMAX) and short-circuit current of ±70 mA; capacitive load stability to 10 nF.
11 Sense input Output sense terminal, which should be a low-impedance connection and can be taken to the load so that I•R loss is included inside the feedback loop.
12 -Gain Drive output Negative gain-drive connection of the input stage that feeds the internal gain-setting network (pin 13 is -RG).
13 -Gain Sense passive Negative internal gain-resistor connection in the gain-setting network paired with pin 6 (+RG).
14 G = 100 passive Gain-of-100 select pin; leave open for G = 1 V/V and connect to pin 6 for G = 100 V/V.
15 -Gain Sense input Negative gain-sense terminal; an external gain resistor RG is connected between pins 2 and 15 to set gains other than 1 and 100, and connections must be kept short to avoid oscillation.
16 -Input input Inverting input of the balanced differential pair, with differential input impedance of 60

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-16
Category Amplifiers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Range of Gain 1 1000 V/V 2
Gain Error, DC 0.005 0.05 % G = 1, ±10V Output 2
Gain Error, DC 0.07 0.25 % G = 100 2
Gain Error, DC (equation) 0.05 % Equation 2
Gain Temp. Co. 10 ppm/°C G = 1, ±10V Output 2
Gain Temp. Co. 25 ppm/°C G = 100 2
Gain Temp. Co. (equation) 25 ppm/°C Equation 2
Nonlinearity, DC 0.0003 0.01 % of FS G = 1, ±10V Output 2
Nonlinearity, DC 0.0006 0.01 % of FS G = 100 2
Output Voltage -11.5 12 V RL = 600Ω, TA = TMIN to TMAX 2
Output Voltage -20 21 V RL = 600Ω, VS = ±25, TA = 25°C 2
Output Current -40 mA TA = TMIN to TMAX 2
Short Circuit Current -70 mA 2
Capacitive Load Stability 10 nF 2
Initial Bias Current 2.5 2000 µA 2
Input Bias Current vs Temp 15 nA/°C TA = TMIN to TMAX 2
Initial Offset Current 0.04 1 µA 2
Offset Current vs Temp 0.5 nA/°C TA = TMIN to TMAX 2
Common-Mode Rejection Ratio CMR 72 86 dB G = 1, DC to 60Hz 2
Common-Mode Rejection Ratio CMR 100 125 dB G = 100, DC to 60Hz 2
Common-Mode Range -11 12 V 2
Voltage Range 9 25 V 3
Quiescent Current 9 12.5 mA 3
Specification Temperature Range 0 70 °C Specification 3
Operation Temperature Range -40 85 °C Operation 3
Storage Temperature Range -40 100 °C Storage 3
Power Supply Voltage -25 25 V 3
Operating Temperature Range -40 85 °C 3
Storage Temperature Range -40 85 °C 3
Junction Temperature 125 °C P, U Package 3
Lead Temperature 300 °C Soldering, 10s 3
Thermal Resistance θJA 100 °C/W 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper audio stages as well. A copper lead frame in the plastic 1

CAD (KiCad official)

  • Symbol: INA103KP
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: PDIP-16 (KiCad packages3D, STEP)
  • 3D model files: ina103kp-etched.step / ina103kp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina103kp.step / ina103kp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 9e42ae4b53eaca4c, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF