component
HX24LC08BDRG
Public Made by Adomby adom
HANSCHIP semiconductor EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HX24LC08BDRG
HANSCHIP semiconductor · EEPROM · SOIC-8
HX24LC08BDRG from HANSCHIP semiconductor, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input; not used (no connect, may be tied to ground) on the 8K HX24LC08B. |
| 2 | A1 | input | Address input; not used (no connect, may be tied to ground) on the 8K HX24LC08B. |
| 3 | A2 | input | Device address input, the only hard-wire address pin used by the 8K HX24LC08B, so two devices may share a bus. |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data, bidirectional open-drain pin that may be wire-ORed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input that clocks data into the device on the positive edge and out on the negative edge. |
| 7 | WP | input | Write protect: at GND allows normal read/write, at VCC protects the full 8K array. |
| 8 | VCC | power_in | Power supply, 1.7V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | -0.3 | 6.5 | V | 9 | |||
| Storage Temperature | -65 | 150 | ℃ | 9 | |||
| Lead Temperature (Soldering) | 245 | ℃ | 10 seconds | 9 | |||
| Operating Ambient Temperature | -40 | 85 | ℃ | 9 | |||
| Supply Voltage | Vcc | 1.7 | 5.5 | V | 9 | ||
| Supply Current Vcc=5.0V | Icc1 | 0.4 | 1 | mA | Read @100KHz | 9 | |
| Supply Current Vcc=5.0V | Icc2 | 2 | 3 | mA | Write @100KHz | 9 | |
| Standby Current | ISB | 2 | uA | Vin=Vcc or GND | 9 | ||
| Input Leakage Current | ILI | 3 | uA | Vin=Vcc or GND | 9 | ||
| Output Leakage Current | ILO | 0.05 | 3 | uA | Vout=Vcc or GND | 9 | |
| Input Low Level | VIL | -0.6 | V | 9 | |||
| Output Low Level Vcc=5.0V | VOL3 | 0.4 | V | IOL=3.0mA | 9 | ||
| Output Low Level Vcc=3.0V | VOL2 | 0.4 | V | IOL=2.1mA | 9 | ||
| Output Low Level Vcc=1.8V | VOL1 | 0.2 | V | IOL=0.15mA | 9 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V | 9 | ||
| Input Capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | VIN = 0V | 9 | ||
| Clock Frequency, SCL (1.8-volt) | fSCL | 400 | KHz | 10 | |||
| Clock Frequency, SCL (5.0-volt) | fSCL | 1000 | KHz | 10 | |||
| Clock Pulse Width Low (1.8-volt) | tLOW | 1.2 | us | 10 | |||
| Clock Pulse Width Low (5.0-volt) | tLOW | 0.6 | us | 10 | |||
| Clock Pulse Width High (1.8-volt) | tHIGH | 0.6 | us | 10 | |||
| Clock Pulse Width High (5.0-volt) | tHIGH | 0.4 | us | 10 | |||
| Noise Suppression Time (1.8-volt) | tI | 50 | us | 10 | |||
| Noise Suppression Time (5.0-volt) | tI | 40 | us | 10 | |||
| Clock Low to Data Out Valid (1.8-volt) | tAA | 0.05 | 0.9 | us | 10 | ||
| Clock Low to Data Out Valid (5.0-volt) | tAA | 0.05 | 0.55 | us | 10 | ||
| Time the bus must be free before a new transmission can start (1.8-volt) | tBUF | 1.2 | us | 10 | |||
| Time the bus must be free before a new transmission can start (5.0-volt) | tBUF | 0.5 | us | 10 | |||
| Start Hold Time (1.8-volt) | tHD.STA | 0.6 | us | 10 | |||
| Start Hold Time (5.0-volt) | tHD.STA | 0.25 | us | 10 | |||
| Start Setup Time (1.8-volt) | tSU.STA | 0.6 | us | 10 | |||
| Start Setup Time (5.0-volt) | tSU.STA | 0.25 | us | 10 | |||
| Data In Hold Time (1.8-volt) | tHD.DAT | 0 | us | 10 | |||
| Data In Hold Time (5.0-volt) | tHD.DAT | 0 | us | 10 | |||
| Data In Setup Time (1.8-volt) | tSU.DAT | 100 | ns | 10 | |||
| Data In Setup Time (5.0-volt) | tSU.DAT | 100 | ns | 10 | |||
| Inputs Rise Time (1.8-volt) | tR | 0.3 | us | 10 | |||
| Inputs Rise Time (5.0-volt) | tR | 0.3 | us | 10 | |||
| Inputs Fall Time (1.8-volt) | tF | 300 | ns | 10 | |||
| Inputs Fall Time (5.0-volt) | tF | 100 | ns | 10 | |||
| Stop Setup Time (1.8-volt) | tSU.STO | 0.6 | us | 10 | |||
| Stop Setup Time (5.0-volt) | tSU.STO | 0.25 | us | 10 | |||
| Data Out Hold Time (1.8-volt) | tDH | 50 | ns | 10 | |||
| Data Out Hold Time (5.0-volt) | tDH | 50 | ns | 10 | |||
| Write Cycle Time (1.8-volt) | tWR | 5 | ms | 10 | |||
| Write Cycle Time (5.0-volt) | tWR | 5 | ms | 10 |
CAD (KiCad official)
- Symbol:
HX24LC08BDRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
hx24lc08bdrg-etched.step/hx24lc08bdrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hx24lc08bdrg.step/hx24lc08bdrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (15 pp, sha256
570f2bebce19de80, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HX24LC08BDRG
**HANSCHIP semiconductor** · EEPROM · SOIC-8
HX24LC08BDRG from HANSCHIP semiconductor, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input; not used (no connect, may be tied to ground) on the 8K HX24LC08B. |
| 2 | A1 | input | Address input; not used (no connect, may be tied to ground) on the 8K HX24LC08B. |
| 3 | A2 | input | Device address input, the only hard-wire address pin used by the 8K HX24LC08B, so two devices may share a bus. |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data, bidirectional open-drain pin that may be wire-ORed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input that clocks data into the device on the positive edge and out on the negative edge. |
| 7 | WP | input | Write protect: at GND allows normal read/write, at VCC protects the full 8K array. |
| 8 | VCC | power_in | Power supply, 1.7V to 5.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | | -0.3 | | 6.5 | V | | 9 |
| Storage Temperature | | -65 | | 150 | ℃ | | 9 |
| Lead Temperature (Soldering) | | | | 245 | ℃ | 10 seconds | 9 |
| Operating Ambient Temperature | | -40 | | 85 | ℃ | | 9 |
| Supply Voltage | Vcc | 1.7 | | 5.5 | V | | 9 |
| Supply Current Vcc=5.0V | Icc1 | | 0.4 | 1 | mA | Read @100KHz | 9 |
| Supply Current Vcc=5.0V | Icc2 | | 2 | 3 | mA | Write @100KHz | 9 |
| Standby Current | ISB | | | 2 | uA | Vin=Vcc or GND | 9 |
| Input Leakage Current | ILI | | | 3 | uA | Vin=Vcc or GND | 9 |
| Output Leakage Current | ILO | | 0.05 | 3 | uA | Vout=Vcc or GND | 9 |
| Input Low Level | VIL | -0.6 | | | V | | 9 |
| Output Low Level Vcc=5.0V | VOL3 | | | 0.4 | V | IOL=3.0mA | 9 |
| Output Low Level Vcc=3.0V | VOL2 | | | 0.4 | V | IOL=2.1mA | 9 |
| Output Low Level Vcc=1.8V | VOL1 | | | 0.2 | V | IOL=0.15mA | 9 |
| Input/Output Capacitance (SDA) | CI/O | | | 8 | pF | VI/O = 0V | 9 |
| Input Capacitance (A0, A1, A2, SCL) | CIN | | | 6 | pF | VIN = 0V | 9 |
| Clock Frequency, SCL (1.8-volt) | fSCL | | | 400 | KHz | | 10 |
| Clock Frequency, SCL (5.0-volt) | fSCL | | | 1000 | KHz | | 10 |
| Clock Pulse Width Low (1.8-volt) | tLOW | 1.2 | | | us | | 10 |
| Clock Pulse Width Low (5.0-volt) | tLOW | 0.6 | | | us | | 10 |
| Clock Pulse Width High (1.8-volt) | tHIGH | 0.6 | | | us | | 10 |
| Clock Pulse Width High (5.0-volt) | tHIGH | 0.4 | | | us | | 10 |
| Noise Suppression Time (1.8-volt) | tI | | | 50 | us | | 10 |
| Noise Suppression Time (5.0-volt) | tI | | | 40 | us | | 10 |
| Clock Low to Data Out Valid (1.8-volt) | tAA | 0.05 | | 0.9 | us | | 10 |
| Clock Low to Data Out Valid (5.0-volt) | tAA | 0.05 | | 0.55 | us | | 10 |
| Time the bus must be free before a new transmission can start (1.8-volt) | tBUF | 1.2 | | | us | | 10 |
| Time the bus must be free before a new transmission can start (5.0-volt) | tBUF | 0.5 | | | us | | 10 |
| Start Hold Time (1.8-volt) | tHD.STA | 0.6 | | | us | | 10 |
| Start Hold Time (5.0-volt) | tHD.STA | 0.25 | | | us | | 10 |
| Start Setup Time (1.8-volt) | tSU.STA | 0.6 | | | us | | 10 |
| Start Setup Time (5.0-volt) | tSU.STA | 0.25 | | | us | | 10 |
| Data In Hold Time (1.8-volt) | tHD.DAT | 0 | | | us | | 10 |
| Data In Hold Time (5.0-volt) | tHD.DAT | 0 | | | us | | 10 |
| Data In Setup Time (1.8-volt) | tSU.DAT | 100 | | | ns | | 10 |
| Data In Setup Time (5.0-volt) | tSU.DAT | 100 | | | ns | | 10 |
| Inputs Rise Time (1.8-volt) | tR | | | 0.3 | us | | 10 |
| Inputs Rise Time (5.0-volt) | tR | | | 0.3 | us | | 10 |
| Inputs Fall Time (1.8-volt) | tF | | | 300 | ns | | 10 |
| Inputs Fall Time (5.0-volt) | tF | | | 100 | ns | | 10 |
| Stop Setup Time (1.8-volt) | tSU.STO | 0.6 | | | us | | 10 |
| Stop Setup Time (5.0-volt) | tSU.STO | 0.25 | | | us | | 10 |
| Data Out Hold Time (1.8-volt) | tDH | 50 | | | ns | | 10 |
| Data Out Hold Time (5.0-volt) | tDH | 50 | | | ns | | 10 |
| Write Cycle Time (1.8-volt) | tWR | | | 5 | ms | | 10 |
| Write Cycle Time (5.0-volt) | tWR | | | 5 | ms | | 10 |
## CAD (KiCad official)
- Symbol: `HX24LC08BDRG`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `hx24lc08bdrg-etched.step` / `hx24lc08bdrg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hx24lc08bdrg.step` / `hx24lc08bdrg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757320841182744576) (15 pp, sha256 `570f2bebce19de80`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hx24lc08bdrg-datasheet.pdf)