component

HX24C02DRG

Public Made by Adom

by adom

HANSCHIP semiconductor EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentmemoryhx24c02drg
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs hx24c02drg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers hx24c02drg: viewers · Ray 27d ago
hx24c02drg-etched.fit.json hx24c02drg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
hx24c02drg-etched.glb hx24c02drg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
hx24c02drg-etched.step hx24c02drg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
hx24c02drg.glb Publish 0.1.0 · Ray 27d ago
hx24c02drg.kicad_mod Publish 0.1.0 · Ray 27d ago
hx24c02drg.kicad_sym Publish 0.1.0 · Ray 27d ago
hx24c02drg.lbr Publish 0.1.0 · Ray 27d ago
hx24c02drg.step Publish 0.1.0 · Ray 27d ago
package.json Publish 0.1.0 · Ray 27d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md hx24c02drg: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

HX24C02DRG

HANSCHIP semiconductor · EEPROM · SOP-8

HX24C02DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Hard-wired to VCC or GND to set the chip's I2C slave address. Up to eight HX24C02 devices may share one bus by strapping A0-A2 uniquely.
2 A1 input Device address input bit 1. Hard-wired to VCC or GND to set the chip's I2C slave address.
3 A2 input Device address input bit 2. Hard-wired to VCC or GND to set the chip's I2C slave address.
4 GND power_in Ground reference for the device.
5 SDA bidirectional Serial data line for the two-wire I2C interface. Open-drain output; requires an external pull-up resistor to VCC. Bi-directional for reads and writes to the EEPROM array.
6 SCL input Serial clock input for the two-wire I2C interface. Positive edge clocks data into the EEPROM; negative edge clocks data out. Max 1 MHz at VCC = 5V; 400 kHz at 1.8V/2.5V/2.7V.
7 WP input Write Protect input. Tied to GND for normal read/write operation. Tied to VCC to hardware-protect the entire 2K array against write operations.
8 VCC power_in Positive supply voltage input. Operating range 1.7 V to 5.5 V. Recommend a 0.1 uF decoupling capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • HX24C02DRG
  • HX24C02DRGPG
  • HX24C02DRGDGKRG
  • HX24C02DRGDBVRG
  • HX24C02DRGDDFRG

CAD (KiCad official)

  • Symbol: HX24C02DRG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hx24c02drg-etched.step / hx24c02drg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx24c02drg.step / hx24c02drg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (17 pp, sha256 8b39cc16ac1b07de, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF