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HT8082ANZ

HTCSEMI · Operational Amplifier · DIP-8

HT8082ANZ from HTCSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output 1 output Output of amplifier 1, which is current limited and protected against a direct short to ground.
2 Inputs 1 - input Inverting input of amplifier 1; the input common mode range extends to VEE, and input voltages should stay between VEE and VCC per the maximum ratings.
3 Inputs 1 (+) input Non-inverting input of amplifier 1; common mode input range at 25°C is VEE to (VCC − 1.8 V) with the ±15 V tests.
4 VEE/GND power_in Negative supply rail, or ground for single-supply operation; the total supply VCC +
5 Inputs 2 (+) input Non-inverting input of amplifier 2; the input common mode range extends to VEE.
6 Inputs 2 (-) input Inverting input of amplifier 2; the input common mode range extends to VEE.
7 Output 2 output Output of amplifier 2, which is current limited and protected against a direct short to ground.
8 VCC power_in Positive supply rail; supply range is 3.0 V to 36 V single supply with VCC +

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package DIP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (VCC=+15 V, VEE=-15 V, TA=+25C) VIO 0.5 3 mV RS = 100 Ω, VCM = 0 V, VO = 0 V; VCC = +15 V, VEE = −15 V, TA = +25C 3
Input Offset Voltage (VCC=+5.0 V, VEE=0 V, TA=+25C) VIO 0.5 3 mV RS = 100 Ω, VCM = 0 V, VO = 0 V; VCC = +5.0 V, VEE = 0 V, TA = +25C 3
Input Offset Voltage (TA = Tlow to Thigh) VIO 5 mV RS = 100 Ω, VCM = 0 V, VO = 0 V; VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh 3
Input Bias Current (TA = +25C) IIB 100 500 nA VCM = 0 V, VO = 0 V; TA = +25C 3
Input Bias Current (TA = Tlow to Thigh) IIB 700 nA VCM = 0 V, VO = 0 V; TA = Tlow to Thigh 3
Input Offset Current (TA = +25C) IIO 6 50 nA VCM = 0 V, VO = 0 V; TA = +25C 3
Input Offset Current (TA = Tlow to Thigh) IIO 300 nA VCM = 0 V, VO = 0 V; TA = Tlow to Thigh 3
Large Signal Voltage Gain (TA = +25C) AVOL 50 100 V/mV VO = 10 V, RL = 2.0 kΩ; TA = +25C 3
Large Signal Voltage Gain (TA = Tlow to Thigh) AVOL 25 V/mV VO = 10 V, RL = 2.0 kΩ; TA = Tlow to Thigh 3
Output Voltage Swing high (VCC=+5.0 V, VEE=0 V, TA=+25C) VOH 3.7 4 V VID = 1.0 V; VCC = +5.0 V, VEE = 0 V, RL = 2.0 kΩ, TA = +25C 3
Output Voltage Swing high (VCC=+15 V, VEE=-15 V, TA=+25C) VOH 13.6 14 V VID = 1.0 V; VCC = +15 V, VEE = −15 V, RL = 10 kΩ, TA = +25C 3
Output Voltage Swing high (TA = Tlow to Thigh) VOH 13.4 V VID = 1.0 V; VCC = +15 V, VEE = −15 V, RL = 2.0 kΩ, TA = Tlow to Thigh 3
Output Voltage Swing low (VCC=+5.0 V, VEE=0 V, TA=+25C) VOL 0.1 0.3 V VID = 1.0 V; VCC = +5.0 V, VEE = 0 V, RL = 2.0 kΩ, TA = +25C 3
Output Voltage Swing low (VCC=+15 V, VEE=-15 V, TA=+25C) VOL -14.7 -14.3 V VID = 1.0 V; VCC = +15 V, VEE = −15 V, RL = 10 kΩ, TA = +25C 3
Output Voltage Swing low (TA = Tlow to Thigh) VOL -13.5 V VID = 1.0 V; VCC = +15 V, VEE = −15 V, RL = 2.0 kΩ, TA = Tlow to Thigh 3
Output Short Circuit Current, source ISC 10 30 mA VID = 1.0 V, VO = 0 V, TA = 25C 3
Output Short Circuit Current, sink ISC 20 30 mA VID = 1.0 V, VO = 0 V, TA = 25C 3
Common Mode Rejection CMR 80 97 dB RS ≤ 10 kΩ, VCM = VICR, TA = 25C 3
Power Supply Rejection PSR 80 97 dB RS = 100 Ω; VCC/VEE = +16.5 V/−16.5 V to +13.5 V/−13.5 V, TA = 25C 3
Power Supply Current per amplifier (VCC=+5.0 V, VEE=0 V, TA=+25C) ID 1.6 2 mA VCC = +5.0 V, VEE = 0 V, VO = +2.5 V, TA = +25C 3
Power Supply Current per amplifier (VCC=+15 V, VEE=-15 V, TA=+25C) ID 1.9 2.5 mA VCC = +15 V, VEE = −15 V, VO = 0 V, TA = +25C 3
Power Supply Current per amplifier (TA = Tlow to Thigh) ID 2.8 mA VCC = +15 V, VEE = −15 V, VO = 0 V, TA = Tlow to Thigh 3
Slew Rate (AV = +1.0) SR 8 10 V/ms Vin = −10 V to +10 V, RL = 2.0 kΩ, CL = 500 pF; AV = +1.0 4
Gain Bandwidth Product GBW 7.5 8.5 MHz f = 100 kHz 4
Channel Separation 120 dB f = 10 kHz 4
Supply Voltage (from VEE to VCC) VS 36 V 2
Operating Junction Temperature TJ 150 C 2
Storage Temperature Range Tstg -60 150 C 2
ESD Capability, Human Body Model HBM 2000 Dual and Quad (Note 3) 2
ESD Capability, Machine Model ESDMM 200 Dual and Quad (Note 3) 2
Ambient Operating Temperature Range TA -40 85 C for all packages 1
Single Supply Voltage 3 36 V Single supply; VCC+/VEE/ ≤ 36 V 4

CAD (KiCad official)

  • Symbol: HT8082ANZ
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: ht8082anz-etched.step / ht8082anz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht8082anz.step / ht8082anz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (19 pp, sha256 fee7f3338815c5cf, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF