component

HT24C02ARZ

Public Made by Adom

by adom

HTCSEMI EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentmemoryht24c02arz
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ht24c02arz: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers ht24c02arz: viewers · Ray 27d ago
ht24c02arz-etched.fit.json ht24c02arz: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ht24c02arz-etched.glb ht24c02arz: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ht24c02arz-etched.step ht24c02arz: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ht24c02arz.glb Publish 0.1.0 · Ray 27d ago
ht24c02arz.kicad_mod Publish 0.1.0 · Ray 27d ago
ht24c02arz.kicad_sym Publish 0.1.0 · Ray 27d ago
ht24c02arz.lbr Publish 0.1.0 · Ray 27d ago
ht24c02arz.step Publish 0.1.0 · Ray 27d ago
package.json Publish 0.1.0 · Ray 27d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md ht24c02arz: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

HT24C02ARZ

HTCSEMI · EEPROM · SOP-8

HT24C02ARZ from HTCSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Hard-wire to VCC or VSS to set the chip's 2-wire slave address; up to eight HT24C02 devices can share one bus. Floating pin is internally read as VSS (low).
2 A1 input Device address input bit 1. Hard-wire to VCC or VSS to set the chip's 2-wire slave address. Floating pin is internally read as VSS (low).
3 A2 input Device address input bit 2. Hard-wire to VCC or VSS to set the chip's 2-wire slave address. Floating pin is internally read as VSS (low).
4 VSS power_in Negative power supply, ground reference.
5 SDA bidirectional Bidirectional 2-wire serial data. Open-drain output; requires an external pull-up resistor to VCC. Can be wire-OR'd with other open-drain/collector devices.
6 SCL input Serial clock input. Positive edge clocks data into the EEPROM; negative edge clocks data out. Max 400 kHz at 1.8-5.0V, up to 1 MHz at 2.5-5.0V.
7 WP input Hardware write protect. Tie to VCC to inhibit writes to the full 2K array (device acts as a serial ROM); tie to VSS or leave floating to allow normal read/write.
8 VCC power_in Positive power supply, 1.8V to 5.5V over -40 to +85 degC. Max 5 mA operating (write at 400 kHz), 3 uA standby.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • HT24C02ARZ
  • HT24C02ARZNZ
  • HT24C02ARZRTZ
  • HT24C02ARZRMZ
  • HT24C02ARZRDZ

CAD (KiCad official)

  • Symbol: HT24C02ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ht24c02arz-etched.step / ht24c02arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht24c02arz.step / ht24c02arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (10 pp, sha256 be1286d196ee2c5e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF