HSM4006

{
  "slug": "hsm4006",
  "version": "0.1.0",
  "type": "component",
  "description": "HUASHUO MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "transistors-thyristors",
    "hsm4006",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hsm4006.kicad_sym",
    "hsm4006.kicad_mod",
    "hsm4006.glb",
    "hsm4006.step",
    "hsm4006.lbr",
    "docs/hero.png",
    "docs/hsm4006-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "hsm4006-hero.glb",
    "hsm4006-hero.overlay.json",
    "hsm4006-etched.glb"
  ],
  "component": {
    "mpn": "HSM4006",
    "manufacturer": "HUASHUO",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757799907086209024",
    "parts": {
      "symbol": "hsm4006.kicad_sym",
      "footprint": "hsm4006.kicad_mod",
      "model_3d": "hsm4006-hero.glb",
      "model_3d_plain": "hsm4006-etched.glb",
      "model_3d_step": "hsm4006-etched.step",
      "model_3d_step_plain": "hsm4006.step",
      "lbr": "hsm4006.lbr"
    },
    "distributor_links": {
      "lcsc": "C700991"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T16:35:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "S",
        "type": "passive",
        "description": "Source of the N-channel MOSFET; the drawing labels this lower-row pin S, and the part is rated VDS 40 V and ID 12 A at TC=25℃."
      },
      {
        "number": "2",
        "name": "S",
        "type": "passive",
        "description": "Source of the N-channel MOSFET, shorted externally with the other source pins; the drawing labels this lower-row pin S."
      },
      {
        "number": "3",
        "name": "S",
        "type": "passive",
        "description": "Source of the N-channel MOSFET, shorted externally with the other source pins; the drawing labels this lower-row pin S."
      },
      {
        "number": "4",
        "name": "G",
        "type": "input",
        "description": "Gate of the N-channel MOSFET with an absolute maximum VGS of ±20 V and a threshold VGS(th) of 1.0 V min to 2.5 V max at ID=250uA."
      },
      {
        "number": "5",
        "name": "D",
        "type": "passive",
        "description": "Drain of the N-channel MOSFET, with VDS 40 V max, and the drawing labels this upper-row pin D."
      },
      {
        "number": "6",
        "name": "D",
        "type": "passive",
        "description": "Drain of the N-channel MOSFET, shorted externally with the other drain pins; the drawing labels this upper-row pin D."
      },
      {
        "number": "7",
        "name": "D",
        "type": "passive",
        "description": "Drain of the N-channel MOSFET, shorted externally with the other drain pins; the drawing labels this upper-row pin D."
      },
      {
        "number": "8",
        "name": "D",
        "type": "passive",
        "description": "Drain of the N-channel MOSFET, shorted externally with the other drain pins; the drawing labels this upper-row pin D."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SOP-8 pin configuration drawing on page 1 is a 3D view that labels pins only by function (S S S ; Source and drain pins are typed passive because the KiCad MOSFET symbol has no dedicated class for t",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 6,
        "cost_usd": 0.206,
        "at": "2026-10-18T16:33:00"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757799907086209024",
        "pages": 6,
        "sha256": "d387d62b25f5632f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "hsm4006.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hsm4006-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8e0e7a569330f64baad18beaf80d53405ce05c991f52578ccd2ad5f6a61a8f8c",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}