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HP3600-AB001-SP16R

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Hynetek Gate Drivers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HP3600-AB001-SP16R

Hynetek · Gate Drivers · SOP-16

HP3600-AB001-SP16R from Hynetek, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INA input Input signal for the A channel with a TTL/CMOS-compatible threshold; the pin is pulled low internally if left open, and tying it to ground when unused is recommended for noise immunity.
2 INB input Input signal for the B channel with a TTL/CMOS-compatible threshold; the pin is pulled low internally if left open, and tying it to ground when unused is recommended for noise immunity.
3 VDDI power_in Primary-side supply voltage, specified from 3 V to 18 V, to be decoupled to GNDI with a low ESR/ESL capacitor placed as close to the device as possible.
4 GNDI power_in Primary-side ground reference to which all primary-side signals are referenced.
5 DIS input Disables both driver outputs when asserted high and enables them when set low or left open; the pin is pulled low internally, and a 1 nF low ESR/ESL capacitor close to the pin is recommended when driven from a distant microcontroller.
6 DTC input Dead-time programming input where a resistor between DTC and GNDI sets the dead time (200 ns typical at RDTC = 20 kΩ), with a bypass capacitor of 2.2 nF or greater recommended between DTC and GNDI.
7 NC unconnected No internal connection.
8 VDDI power_in Primary-side supply voltage that is internally shorted to pin 3.
9 GNDB power_in Ground reference for the secondary-side B channel driver.
10 OUTB output Output of driver B, connected to the gate of the B-channel FET.
11 VDDB power_in Secondary-side supply for driver B, specified from 3.5 V to 30 V for the output supply, to be decoupled to GNDB with a low ESR/ESL capacitor placed close to the device.
12 NC unconnected No internal connection.
13 NC unconnected No internal connection.
14 GNDA power_in Ground reference for the secondary-side A channel driver.
15 OUTA output Output of driver A, connected to the gate of the A-channel FET.
16 VDDA power_in Secondary-side supply for driver A, specified from 3.5 V to 30 V for the output supply, to be decoupled to GNDA with a low ESR/ESL capacitor placed close to the device.

Key specifications

Parameter Value
Manufacturer Hynetek
Package SOP-16
Category Motor Driver ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply voltage VDDI 3 18 V 6
Input supply quiescent current IDDI 1.5 2 2.5 mA VINA = 0 V, VINB = 0 V 6
Input supply operating current IDDI 1.9 2 3.1 mA Fsw = 50 kHz, current per channel, COUT = 100 pF 6
Output supply voltage VDDA/VDDB 3.5 30 V 6
Output supply quiescent current IVDDA/IVVDB 0.8 1.3 2 mA VINA = 0 V, VINB = 0 V 6
Output supply operating current IVDDA/IVVDB 1.2 1.7 2.3 mA Fsw = 50 kHz, current per channel, COUT = 100 pF 6
UVLO turn-on threshold (VDDA/VDDB) VUVLO_ON 3.2 3.5 3.8 V 6
UVLO turn-off threshold (VDDA/VDDB) VUVLO_OFF 2.7 3 3.3 V 6
UVLO turn-on threshold (VDDI) VDDI_ON 2.5 2.7 2.9 V 6
UVLO turn-off threshold (VDDI) VDDI_OFF 2.3 2.5 2.7 V 6
Input voltage threshold for transition Low to High VINH 1.7 2.1 V 6
Input voltage threshold for transition High to Low VINL 0.8 1.1 V 6
Input voltage threshold hysteresis VIN_HYST 0.4 0.8 1.2 V 6
Pull down resistance on VIA, VIB, DIS and PWM RPD 100 170 280 kΩ 6
Dead time tDT 160 200 240 ns RDTC = 20 kΩ 6
Output supply voltage, VDDA, VDDB, continuous VDDA, VDDB -0.3 35 V continuous 8
Output voltage OUTA to GNDA, OUTB to GNDB, continuous (max VDDx + 0.3 V) -0.3 V continuous 8
Output voltage OUTA, OUTB, transient (max VDDx + 1.5 V) -3 V transient for 200 ns 8
Input supply voltage VDDI to GND VDDI -0.3 20 V 8
Input voltage INA, INB, DIS, DTC (max VDDI + 0.3 V) -7 V 8
Output channel to channel internal isolation 1500 V 8
Junction temperature range -40 150 °C 8
Storage temperature -65 150 °C 8
Electrostatic discharge, human body model 3000 V Human body model 8
Electrostatic discharge, charged device model 2000 V Changed device model (as printed) 8
Thermal resistance, junction to ambient (SOP-16) θJA 150 °C/W Natural convection, one cubic foot sealed enclosure 8
Thermal resistance, junction to case (SOP-16) θJC 38 °C/W 8

CAD (KiCad official)

  • Symbol: HP3600-AB001-SP16R
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: hp3600-ab001-sp16r-etched.step / hp3600-ab001-sp16r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hp3600-ab001-sp16r.step / hp3600-ab001-sp16r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Hynetek datasheet (11 pp, sha256 4f58e81aef54c0b0, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF