HK32G003F4P7

{
  "slug": "hk32g003f4p7",
  "version": "0.1.0",
  "type": "component",
  "description": "HK Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "hk32g003f4p7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hk32g003f4p7.kicad_sym",
    "hk32g003f4p7.kicad_mod",
    "hk32g003f4p7.glb",
    "hk32g003f4p7.step",
    "hk32g003f4p7.lbr",
    "docs/hero.png",
    "docs/hk32g003f4p7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "hk32g003f4p7-hero.glb",
    "hk32g003f4p7-hero.overlay.json",
    "hk32g003f4p7-etched.glb"
  ],
  "component": {
    "mpn": "HK32G003F4P7",
    "manufacturer": "HK",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604450693231501312",
    "parts": {
      "symbol": "hk32g003f4p7.kicad_sym",
      "footprint": "hk32g003f4p7.kicad_mod",
      "model_3d": "hk32g003f4p7-hero.glb",
      "model_3d_plain": "hk32g003f4p7-etched.glb",
      "model_3d_step": "hk32g003f4p7-etched.step",
      "model_3d_step_plain": "hk32g003f4p7.step",
      "lbr": "hk32g003f4p7.lbr"
    },
    "distributor_links": {
      "lcsc": "C33576239"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T14:08:32Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PD4",
        "type": "bidirectional",
        "description": "Port D I/O that is 5 V tolerant (FT); alternate functions include MCO, ADC_ETR, I2C_SMBA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH4, TIM2_CH1 and EXTI4, and all I/O are in analog mode during and after reset unless stated otherwise."
      },
      {
        "number": "2",
        "name": "PD5",
        "type": "bidirectional",
        "description": "Port D I/O that is not 5 V tolerant; alternate functions include SWDIO (debug data), MCO, ADC_ETR, UART1_TX, UART2_TX, SPI_MISO, TIM1_ETR, TIM2_ETR, EXTI5 and analog input ADC_AIN0."
      },
      {
        "number": "3",
        "name": "PD6",
        "type": "bidirectional",
        "description": "Port D I/O that is not 5 V tolerant; alternate functions include MCO, ADC_ETR, I2C_SMBA, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2, TIM2_CH2, EXTI6 and analog input ADC_AIN1."
      },
      {
        "number": "4",
        "name": "NRST_PA0",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) pin that serves as the active-low external reset input NRST (internal pull-up; low pulses shorter than 80 ns are ignored) or as GPIO PA0, with alternate functions I2C_SMBA, UART1_TX, UART2_TX, SPI_NSS, TIM1_BKIN, TIM2_CH3, ADC_ETR and EXTI0."
      },
      {
        "number": "5",
        "name": "PA1",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO that can also act as external clock input EXTCLK1 (GPIO external clock up to 32 MHz), with alternate functions I2C_SCL, UART1_TX, UART2_TX, SPI_SCK, TIM1_CH1N, TIM2_ETR, ADC_ETR and EXTI1."
      },
      {
        "number": "6",
        "name": "PA2",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions I2C_SMBA, UART1_RX, UART2_RX, SPI_SCK, TIM1_CH2N, TIM2_CH4, ADC_ETR and EXTI2, and additional wake-up function WKUP3."
      },
      {
        "number": "7",
        "name": "VSS/VSSA",
        "type": "power_in",
        "description": "Ground pin; all VDD and VSS pins must be connected to the external supply system, and the voltage difference between different ground pins must not exceed 50 mV."
      },
      {
        "number": "8",
        "name": "PD7",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions I2C_SMBA, UART1_RX, UART2_RX, SPI_NSS, TIM1_BKIN, TIM1_CH3, TIM2_CH1, EXTCLK2_MCO, ADC_ETR and EXTI7, where the TIM1_CH3/TIM1_BKIN choice requires additional IOMUX register configuration."
      },
      {
        "number": "9",
        "name": "VDD/VDDA",
        "type": "power_in",
        "description": "Single supply pin for the digital and analog circuits (VDD and VDDA are tied together internally), specified at 2.4 V to 5.5 V."
      },
      {
        "number": "10",
        "name": "PA3",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions MCO, ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_NSS, TIM1_CH3N, TIM2_CH3 and EXTI3."
      },
      {
        "number": "11",
        "name": "PB5",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with SWCLK (SWD clock) as an alternate function, plus ADC_ETR, I2C_SDA, UART1_RX, UART2_RX, SPI_NSS, TIM1_BKIN, TIM2_CH2, EXTCLK3 and EXTI5."
      },
      {
        "number": "12",
        "name": "PB4",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2N, TIM2_ETR and EXTI4."
      },
      {
        "number": "13",
        "name": "PC3",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions MCO, ADC_ETR, I2C_SCL, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH1N, TIM1_CH3, TIM2_CH1 and EXTI3, where the TIM1 CH3/CH1N choice requires additional IOMUX configuration."
      },
      {
        "number": "14",
        "name": "PC4",
        "type": "bidirectional",
        "description": "Port C I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SDA, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2N, TIM1_CH4, TIM2_CH4, WKUP1 and EXTI4, and analog input ADC_AIN2."
      },
      {
        "number": "15",
        "name": "PC5",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_SCK, TIM1_ETR, TIM2_CH1, EXTCLK4 and EXTI5."
      },
      {
        "number": "16",
        "name": "PC6",
        "type": "bidirectional",
        "description": "Port C I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MOSI, TIM1_CH1, TIM2_CH3 and EXTI6, and analog input ADC_AIN6."
      },
      {
        "number": "17",
        "name": "PC7",
        "type": "bidirectional",
        "description": "5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2, TIM2_ETR and EXTI7, and additional wake-up function WKUP2."
      },
      {
        "number": "18",
        "name": "PD1",
        "type": "bidirectional",
        "description": "Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SMBA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH1, TIM2_CH4 and EXTI1, and analog input ADC_AIN5."
      },
      {
        "number": "19",
        "name": "PD2",
        "type": "bidirectional",
        "description": "Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH2, TIM2_CH3 and EXTI2, and analog input ADC_AIN4."
      },
      {
        "number": "20",
        "name": "PD3",
        "type": "bidirectional",
        "description": "Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_SCK, TIM1_CH3, TIM2_CH2 and EXTI3, and analog input ADC_AIN3."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and names are taken from the Table 6-1 TSSOP20 column (pages 34-37). The TSSOP20 pin dia; Table 6-1 has no TSSOP20 pin 0. The pin 0 exposed-pad VSS entry applies only to the QFN20 package an; Only pins marked FT in the datasheet are 5 V tolerant (NRST_PA0, PA1, PA2, PD7, PA3, PB5, PB4, PC3, "
        ],
        "pages_sent": 46,
        "cost_usd": 0.1735,
        "at": "2026-10-18T14:06:19"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604450693231501312",
        "pages": 56,
        "sha256": "eb1ef17518db61e0",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "hk32g003f4p7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hk32g003f4p7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7515c7a46b195b6c97314f7144bcc6d87bbb5b9e0e081702c8403b9f77fbac5b",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}