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HK32G003F4P7

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HK Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HK32G003F4P7

HK · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

HK32G003F4P7 from HK, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD4 bidirectional Port D I/O that is 5 V tolerant (FT); alternate functions include MCO, ADC_ETR, I2C_SMBA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH4, TIM2_CH1 and EXTI4, and all I/O are in analog mode during and after reset unless stated otherwise.
2 PD5 bidirectional Port D I/O that is not 5 V tolerant; alternate functions include SWDIO (debug data), MCO, ADC_ETR, UART1_TX, UART2_TX, SPI_MISO, TIM1_ETR, TIM2_ETR, EXTI5 and analog input ADC_AIN0.
3 PD6 bidirectional Port D I/O that is not 5 V tolerant; alternate functions include MCO, ADC_ETR, I2C_SMBA, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2, TIM2_CH2, EXTI6 and analog input ADC_AIN1.
4 NRST_PA0 bidirectional 5 V tolerant (FT) pin that serves as the active-low external reset input NRST (internal pull-up; low pulses shorter than 80 ns are ignored) or as GPIO PA0, with alternate functions I2C_SMBA, UART1_TX, UART2_TX, SPI_NSS, TIM1_BKIN, TIM2_CH3, ADC_ETR and EXTI0.
5 PA1 bidirectional 5 V tolerant (FT) GPIO that can also act as external clock input EXTCLK1 (GPIO external clock up to 32 MHz), with alternate functions I2C_SCL, UART1_TX, UART2_TX, SPI_SCK, TIM1_CH1N, TIM2_ETR, ADC_ETR and EXTI1.
6 PA2 bidirectional 5 V tolerant (FT) GPIO with alternate functions I2C_SMBA, UART1_RX, UART2_RX, SPI_SCK, TIM1_CH2N, TIM2_CH4, ADC_ETR and EXTI2, and additional wake-up function WKUP3.
7 VSS/VSSA power_in Ground pin; all VDD and VSS pins must be connected to the external supply system, and the voltage difference between different ground pins must not exceed 50 mV.
8 PD7 bidirectional 5 V tolerant (FT) GPIO with alternate functions I2C_SMBA, UART1_RX, UART2_RX, SPI_NSS, TIM1_BKIN, TIM1_CH3, TIM2_CH1, EXTCLK2_MCO, ADC_ETR and EXTI7, where the TIM1_CH3/TIM1_BKIN choice requires additional IOMUX register configuration.
9 VDD/VDDA power_in Single supply pin for the digital and analog circuits (VDD and VDDA are tied together internally), specified at 2.4 V to 5.5 V.
10 PA3 bidirectional 5 V tolerant (FT) GPIO with alternate functions MCO, ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_NSS, TIM1_CH3N, TIM2_CH3 and EXTI3.
11 PB5 bidirectional 5 V tolerant (FT) GPIO with SWCLK (SWD clock) as an alternate function, plus ADC_ETR, I2C_SDA, UART1_RX, UART2_RX, SPI_NSS, TIM1_BKIN, TIM2_CH2, EXTCLK3 and EXTI5.
12 PB4 bidirectional 5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2N, TIM2_ETR and EXTI4.
13 PC3 bidirectional 5 V tolerant (FT) GPIO with alternate functions MCO, ADC_ETR, I2C_SCL, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH1N, TIM1_CH3, TIM2_CH1 and EXTI3, where the TIM1 CH3/CH1N choice requires additional IOMUX configuration.
14 PC4 bidirectional Port C I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SDA, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2N, TIM1_CH4, TIM2_CH4, WKUP1 and EXTI4, and analog input ADC_AIN2.
15 PC5 bidirectional 5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_SCK, TIM1_ETR, TIM2_CH1, EXTCLK4 and EXTI5.
16 PC6 bidirectional Port C I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MOSI, TIM1_CH1, TIM2_CH3 and EXTI6, and analog input ADC_AIN6.
17 PC7 bidirectional 5 V tolerant (FT) GPIO with alternate functions ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_MISO, TIM1_CH2, TIM2_ETR and EXTI7, and additional wake-up function WKUP2.
18 PD1 bidirectional Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SMBA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH1, TIM2_CH4 and EXTI1, and analog input ADC_AIN5.
19 PD2 bidirectional Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SDA, UART1_TX, UART2_TX, SPI_MOSI, TIM1_CH2, TIM2_CH3 and EXTI2, and analog input ADC_AIN4.
20 PD3 bidirectional Port D I/O that is not 5 V tolerant; alternate functions include ADC_ETR, I2C_SCL, UART1_RX, UART2_RX, SPI_SCK, TIM1_CH3, TIM2_CH2 and EXTI3, and analog input ADC_AIN3.

Key specifications

Parameter Value
Manufacturer HK
Package TSSOP-20
Category Embedded Processors & Controllers
Pins 20

CAD (KiCad official)

  • Symbol: HK32G003F4P7
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: hk32g003f4p7-etched.step / hk32g003f4p7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hk32g003f4p7.step / hk32g003f4p7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HK datasheet (56 pp, sha256 eb1ef17518db61e0, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF